SOT-MRAM Cell With Mott Selectors and Asynchronous Writing

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Solution Overview

Problem

Spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) cells have a lower integration density due to their 2T1R configuration, making them incompatible with crossbar arrays, and existing solutions to integrate selectors with MRAM cells either increase read energy or reduce durability.

Innovation Solution

A 2S1R structure with integrated selectors based on Mott oxides or 2D topological insulators, combined with asynchronous writing modes exploiting hysteresis effects, reduces energy consumption and enables dense memory structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a 2T1R configuration is used in SOT MRAM, then the memory cell can be operated with separate read and write paths, but the integration density is reduced and compatibility with crossbar arrays is lost

Engineering Contradiction:
Improveseparate read and write pathsVSAvoidintegration density
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the selector function with the read transistor by using the same transistor for both selection and reading operations. This integration reduces the number of separate components needed, thereby increasing integration density while maintaining the ability to perform separate read and write operations through different current paths.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The read transistor is designed to serve dual purposes: acting as a selector switch to enable/disable specific memory cells during write operations, and simultaneously serving as the read path transistor to sense the resistance state of the magnetic tunnel junction. This multi-functionality reduces component count and improves integration density.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If varistors or OTS phase-change conductors are used as selectors in 1S1R memory cells, then the structure becomes more compact, but the voltage range compatibility is lost due to high switching threshold voltages

Engineering Contradiction:
Improvestructure compactnessVSAvoidvoltage range compatibility
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent changes the electrical parameters of the selector transistor by carefully designing its threshold voltage to be compatible with the low operating voltage range of MRAM cells (1.3V to 2V). This is achieved through specific transistor design and material selection, allowing the selector to switch at voltages that do not exceed the breakdown voltage of the tunnel barrier, thus maintaining voltage range compatibility while achieving a compact 1S1T1R structure.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If the write transistor is replaced by a selector in 1S1T1R structure, then the integration density is improved, but the durability is reduced because the writing current passes through the magnetic tunnel junction

Engineering Contradiction:
Improveintegration densityVSAvoiddurability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the current paths by using two separate transistors: one transistor (acting as selector) controls the write current path through the SOT track, while the other transistor controls the read current path through the magnetic tunnel junction. This segmentation ensures that write currents do not pass through the MTJ, preserving its durability, while still achieving improved integration density compared to the traditional 2T1R configuration.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution allows for the fabrication of dense memory structures with reduced energy consumption and improved durability by minimizing the number of control voltages required for writing operations.

Implementation Method 1

a writing track made of a spin Hall effect material or an orbital Hall effect material

Methodology Applied
Scientific EffectSpin Hall Effect: Hall Effect

Implementation Method 2

a support layer made of a material having a configurable metal-insulator transition

Methodology Applied
Scientific EffectMetal-Insulator Transition: Phase Change

Implementation Method 3

magnetic tunnel junctions whose resistance varies depending on the orientation of the magnetic layers

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Implementation Method 4

asynchronous writing modes exploiting hysteresis effects

Methodology Applied
Scientific EffectHysteresis: Hysteresis

Data Source

PatentEP4697332A1Magnetoresistive memory with integrated selectors
Publication Date: 2026.02.18 COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
  • EP4697332A1 patent drawingFigure 1a~1b
  • EP4697332A1 patent drawingFigure 1c~2
  • EP4697332A1 patent drawingFigure 3a

AI summary

The invention relates to a magnetoresistive memory cell comprising: - a pillar (MTJ) forming a magnetic tunnel junction (MTJ) and a write track (SOT) in a spin Hall effect material or an orbital Hall effect material; - a support layer (14) in a material having a configurable metal-insulator transition; - a first electrode (EL1) disposed on the support layer (14); the part (143) of the support layer (14) confined between the first electrode (EL1) and the write track (SOT) forming a first selector (S1); - a second electrode (EL2) disposed on the support layer (14); the part (144) of the support layer (14) confined between the second electrode (EL2) and the write track (SOT) forming a second selector (S2).