SOT-MRAM Bottom Electrode Via Layout for Lower Resistance
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Solution Overview
Problem
Current magnetic random access memory (MRAM) devices, particularly spin-transfer torque (STT) and spin-orbit torque (SOT) MRAM, face challenges in optimizing the structure and position of components to enhance operational performance and reduce electrical resistance.
Innovation Solution
The design of a spin-orbit torque magnetic random access memory device with a bottom electrode partially disposed in a via hole and a spin-orbit torque layer, along with a magnetic tunneling junction structure, to improve operational performance and reduce electrical resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the bottom electrode is completely disposed above the dielectric layer, then the manufacturing process is simpler, but the electrical resistance is higher
Solution Approach 1:
The bottom electrode is segmented into two portions: a first portion disposed above the dielectric layer and a second portion extending into the via hole. This segmentation allows the electrode to simultaneously achieve lower resistance through the via hole path and maintain manufacturability through the separate formation steps of the via hole and electrode structure.
Solution Approach 2:
The bottom electrode extends in the vertical dimension by utilizing the via hole space, rather than being confined to a single horizontal plane above the dielectric layer. This dimensional extension provides an additional conduction path that reduces electrical resistance while the via hole structure maintains manufacturing feasibility.
2Reliability
If the spin-orbit torque layer is disposed completely above the dielectric layer, then the structure is simpler, but the operational performance is reduced
Solution Approach 1:
The spin-orbit torque layer is segmented into a first portion above the dielectric layer and a second portion within the via hole. This segmentation enables the layer to provide enhanced spin-orbit torque effect through the via hole region while maintaining overall structural organization through systematic formation processes.
Solution Approach 2:
The spin-orbit torque layer is nested within the via hole structure, with the second portion of the layer filling and utilizing the via hole space. This nesting approach maximizes the functional volume of the spin-orbit torque layer for improved operational performance while the via hole provides the structural framework.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure simplifies manufacturing processes and reduces electrical resistance, thereby enhancing the overall performance of the SOT-MRAM device.
Implementation Method 1
spin-orbit torque magnetic random access memory device
Implementation Method 2
the resistance of the MRAM cell is different when the magnetization alignments of the data layer and the reference layer are the same or not
Data Source
AI summary
A spin-orbit torque magnetic random access memory device includes a dielectric layer, a magnetic tunneling junction structure, a spin-orbit torque layer, and bottom electrode. The dielectric layer is disposed above a substrate, and a first via hole penetrates through the dielectric layer in a vertical direction. The magnetic tunneling junction structure and the spin-orbit torque layer are disposed above the dielectric layer, and the magnetic tunneling junction structure is located on the spin-orbit torque layer. The bottom electrode is disposed above the substrate, and the bottom electrode is located under the spin-orbit torque layer. A first portion of the bottom electrode is disposed above the dielectric layer, and a second portion of the bottom electrode is disposed in the first via hole and directly connected with the first portion of the bottom electrode.