SOT-MRAM Write Path Separation and Negative Voltage Generation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Spin transfer torque magnetic random access memory (STT-MRAM) faces increased operation time and varying energy consumption during write operations due to the same paths for read and write currents, which depend on the resistance of the magnetic tunneling junction (MTJ).
Innovation Solution
The proposed solution involves a spin orbit torque magnetoresistive random access memory (SOT-MRAM) with a semiconductor device and method that utilize a line driving unit, switch unit, and power supply unit to differentiate read and write current paths, employing a negative voltage generation unit and discharge transistors to manage voltages and reduce energy consumption during write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the same path is used for both read and write currents in STT-MRAM, then the device structure is simplified, but the energy consumption during write operation varies depending on MTJ resistance and operation time increases
Solution Approach 1:
The patent divides the current path into separate read current path and write current path. The read current flows through the MTJ to sense resistance, while the write current flows through the spin injection layer to switch magnetization. This segmentation allows independent optimization of each operation's current characteristics, resolving the contradiction between simplified structure and variable energy consumption.
Solution Approach 2:
The write current path is extracted from the read current path. By using a dedicated write current path that does not pass through the MTJ, the patent eliminates the dependency of write operation energy on MTJ resistance, while maintaining the simplified structure benefit through shared circuit components.
2Device complexity
If the same path is used for both read and write currents in STT-MRAM, then the device structure is simplified, but the operation time during write operation increases
Solution Approach 1:
The patent segments the current paths to allow simultaneous or independent execution of read and write operations. The separate write current path enables write operations to proceed without being constrained by read operation timing requirements, reducing write operation time while keeping the overall device structure simple.
3Use of energy by moving object
If separate paths are used for read and write currents in SOT-MRAM, then energy consumption during write operation is reduced and becomes independent of MTJ resistance, but the device structure becomes more complex
Solution Approach 1:
The patent implements multi-functionality in the power supply unit, which generates both positive voltage for read operations and negative voltage for write operations. This universal power supply structure supports both separate current paths without requiring completely independent voltage generation circuits, thereby reducing the complexity increase from path separation.
Solution Approach 2:
The spin injection layer acts as an intermediary that converts electrical current into spin polarization without requiring the current to pass through the MTJ. This intermediary mechanism enables the separate write current path to achieve low resistance switching while maintaining a relatively simple overall structure through the use of standard magnetic tunneling junction components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces energy consumption during write operations by reusing precharge voltage and generating a negative voltage, thereby minimizing dependence on MTJ resistance and improving write operation efficiency.
Implementation Method 1
a negative voltage generation unit that charge-shares the precharge voltage to be charged with a first voltage and discharges the first voltage to one side to generate a negative voltage on the other side
Implementation Method 2
spin orbit torque magnetoresistive random access memory (SOT-MRAM)
Data Source
AI summary
A semiconductor device includes a line driving unit connected to a memory cell array, a switch unit including first and second output terminals electrically connected to the memory cell array through a plurality of bit lines and a plurality of source lines, and a power supply unit outputting a precharge voltage and a source voltage to the first and second output terminals. The power supply unit includes a negative voltage generation unit that charge-shares the precharge voltage to be charged with a first voltage and discharges the first voltage to one side to generate a negative voltage on the other side.