SOTB Level Shifter Layout for Low-Leakage Voltage Conversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Leakage current in level shifters configured with SOTB transistors hinders the reduction of power consumption in semiconductor devices, which is essential for integrating low-voltage and high-voltage circuits within a semiconductor chip.
Innovation Solution
A semiconductor device design incorporating a low-breakdown-voltage n-type transistor and a high-breakdown-voltage n-type transistor, with the impurity concentration of the channel formation region of the n-type transistor in the switch unit being higher than that of the low-breakdown-voltage n-type transistor, to reduce leakage current and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If SOTB transistors are used to reduce driving voltage and power consumption, then power consumption is reduced, but leakage current increases
Solution Approach 1:
The patent applies different impurity concentrations to different regions of the transistor structure. Specifically, the channel formation region has a higher impurity concentration (1×10^18 to 1×10^20 atoms/cm³) compared to conventional SOTB transistors, while the buried insulating layer thickness is optimized at 5-20 nm. This local variation in material properties reduces leakage current through the channel while maintaining the low driving voltage characteristics of SOTB transistors.
Solution Approach 2:
The patent changes key parameters of the SOTB transistor structure: increasing the impurity concentration of the channel formation region to 1×10^18 to 1×10^20 atoms/cm³ and optimizing the buried insulating layer thickness to 5-20 nm. These parameter changes suppress leakage current while maintaining low power consumption, resolving the contradiction between reduced power consumption and increased leakage current.
2Productivity
If low-voltage circuits and high-voltage circuits are integrated on the same chip, then integration density is improved, but signal transfer between voltage domains requires level shifters
Solution Approach 1:
The patent designs the level shifter using SOTB transistors that can operate across multiple voltage domains. The transistors are configured to handle both low-voltage signals from the first circuit and high-voltage signals in the second circuit, enabling the level shifter to perform voltage level conversion while maintaining compatibility with both voltage domains. This multi-functional approach reduces the need for separate voltage domain management circuits.
Solution Approach 2:
The level shifter utilizes SOTB transistors with optimized parameters (buried insulating layer thickness of 5-20 nm and channel impurity concentration of 1×10^18 to 1×10^20 atoms/cm³) that enable operation at both low and high voltage levels. This parameter optimization allows the level shifter to efficiently transfer signals between voltage domains without requiring additional complexity.
Data Source
AI summary
Reduction in power consumption of a semiconductor device is achieved. The semiconductor device includes: a first circuit operating at a first power supply voltage and a second circuit operating at a second power supply voltage and including a level shift unit and a switch unit, the first circuit is configured of a low-breakdown-voltage n-type transistor that is an SOTB transistor, and the switch unit is configured of an n-type transistor that is an SOTB transistor. A second power supply voltage is higher than a first power supply voltage, and an impurity concentration of a channel formation region of the n-type transistor is higher than an impurity concentration of a channel formation region of the low-breakdown-voltage n-type transistor.