SOTB Transistor Substrate Bias Control for Wearable Power Reduction
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Solution Overview
Problem
Existing semiconductor devices for wearable devices face challenges in reducing power consumption while maintaining stable operation, as techniques like dynamic voltage and frequency scaling (DVFS) do not effectively reduce standby current and substrate bias voltage changes are unstable, leading to increased costs and power consumption.
Innovation Solution
A semiconductor integrated circuit device incorporating P-type and N-type SOTB transistors with a substrate bias circuit that supplies specific substrate bias voltages to manage operation speeds and threshold voltages, preventing leakage current and stabilizing device operation while reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If DVFS technique is used to lower operating frequency, then power consumption is reduced, but standby current is not reduced and frequency change range is limited to about 50%
Solution Approach 1:
The patent applies parameter changes by modifying the substrate bias voltage to control the threshold voltage of transistors, enabling operation frequency to be changed in digit units (e.g., 1/2, 1/4, 1/8) beyond the limited 50% range of DVFS. This allows the operating frequency to be adjusted in finer increments while maintaining stable operation, thereby expanding the adaptability and frequency change range while still achieving power consumption reduction.
2Use of energy by moving object
If substrate bias voltage is changed to reduce power consumption, then power consumption may be reduced, but stable operation of the semiconductor device becomes difficult
Solution Approach 1:
The patent employs feedback mechanisms through mode designation circuits that monitor operating conditions and automatically adjust the substrate bias voltage to appropriate levels. The circuit includes multiple operation modes (first mode with first substrate bias voltage, second mode with second substrate bias voltage) that are selected based on operational requirements, ensuring stable operation is maintained while achieving power consumption reduction. This feedback control prevents unstable operation that would result from arbitrary substrate bias voltage changes.
3Use of energy by moving object
If two semiconductor devices (main CPU and sub CPU) are used to achieve different operation speeds, then power consumption can be reduced by using low-speed CPU for watch functions, but the number of mounted semiconductor devices increases and cost increases
Solution Approach 1:
The patent merges the functions of multiple semiconductor devices into a single semiconductor device by integrating multiple operation modes within one device. The single semiconductor device can operate in a first operation mode (first operation speed) for terminal functions and a second operation mode (second operation speed) for wristwatch functions, eliminating the need for separate main CPU and sub CPU devices. This integration reduces the number of mounted devices, lowers cost, and simplifies device complexity while maintaining the power consumption benefits of variable-speed operation.
Data Source
AI summary
To provide a semiconductor device which can be stably operated while achieving a reduction of the power consumption.A semiconductor device includes a CPU, a system controller which designates an operation speed of the CPU, P-type SOTB transistors, and N-type SOTB transistors. The semiconductor device is provided with an SRAM which is connected to the CPU, and a substrate bias circuit which is connected to the system controller and is capable of supplying substrate bias voltages to the P-type SOTB transistors and the N-type SOTB transistors. Here, when the system controller designates a low speed mode to operate the CPU at a low speed, the substrate bias circuit supplies the substrate bias voltages to the P-type SOTB transistors and the N-type SOTB transistors.