Source Beam Optimization for Lithography Printability
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Solution Overview
Problem
Current lithography processes face challenges in achieving precise alignment between the final wafer pattern and the target wafer pattern due to limitations in mask making and wafer fabrication processes, leading to variances in lithography printability, especially at smaller feature sizes.
Innovation Solution
The implementation of a Source Beam Optimization (SBO) method that co-optimizes mask shot maps and illumination source maps using a model-based approach to minimize differences between the target and final wafer patterns, adjusting exposure conditions in both mask making and wafer making processes to enhance lithography printability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If existing mask optimization methods (OPC, MPC, ILT) are used, then lithography printability is enhanced to some extent, but variances between final and target wafer patterns persist due to limitations in mask making and wafer fabrication processes
Solution Approach 1:
The patent segments the lithography optimization process into two distinct optimization stages: mask shot map optimization and illumination source map optimization. This segmentation allows each aspect to be optimized independently and systematically, addressing the root causes of pattern variances more effectively than conventional single-stage methods.
Solution Approach 2:
The patent performs preliminary optimization of the mask shot map and illumination source map before actual lithography fabrication. By predicting and correcting potential variances in advance through computational models, the method prevents pattern alignment issues before they manifest in the final wafer, thereby improving reliability without sacrificing precision.
2Productivity
If feature sizes are reduced to increase IC device density, then productivity is improved, but lithography printability capability deteriorates due to process limitations
Solution Approach 1:
The patent changes key parameters of the lithography process by optimizing the mask shot map (exposure conditions) and illumination source map (light distribution). These parameter adjustments compensate for the reduced printability caused by smaller feature sizes, enabling higher device density while maintaining manufacturing precision through computational corrections.
3Manufacturing precision
If mask optimization is performed using conventional methods, then some lithography enhancement is achieved, but variances between target and final patterns remain due to unaddressed wafer fabrication process limitations
Solution Approach 1:
The patent implements a feedback mechanism where the optimization process uses predicted pattern variances from both mask making and wafer fabrication processes to adjust the mask shot map and illumination source map. This closed-loop approach ensures that information about process limitations is fed back into the optimization, preserving pattern fidelity by pre-compensating for expected deviations.
Data Source
AI summary
Source beam optimization (SBO) methods are disclosed herein for enhancing lithography printability. An exemplary method includes receiving an integrated circuit (IC) design layout and performing an SBO process using the IC design layout to generate a mask shot map and an illumination source map. The SBO process uses an SBO model that collectively simulates a mask making process using the mask shot map and a wafer making process using the illumination source map. A mask can be fabricated using the mask shot map, and a wafer can be fabricated using the illumination source map (and, in some implementations, using the mask fabricated using the mask shot map). The wafer includes a final wafer pattern that corresponds with a target wafer pattern defined by the IC design layout. The SBO methods disclosed herein can significantly reduce (or eliminate) variances between the final wafer pattern and the target wafer pattern.