Source/Drain Contact Air Gap Structure for Lower RC Delay
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Solution Overview
Problem
As the semiconductor industry advances with smaller dimensions and increased density of integrated circuits, the resulting parasitic capacitance leads to increased power consumption and signal delays due to the resistive-capacitive (RC) time constant.
Innovation Solution
The implementation of a semiconductor device fabrication process that includes forming a source/drain epitaxial layer, a series of interlayer dielectric (ILD) layers, and a sacrificial layer to create an air gap between the source/drain contact and the ILD layers, thereby reducing parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the distance between conductive features is decreased to increase density, then the capacitance increases, but power consumption increases and signal delays increase
Solution Approach 1:
The patent extracts the harmful dielectric material between adjacent conductive features and replaces it with air gaps. By removing the solid dielectric that causes parasitic capacitance, the invention directly addresses the energy loss problem while maintaining high density layout. The air gap acts as a low-permittivity region that reduces capacitive coupling between neighboring conductors.
Solution Approach 2:
The patent changes the permittivity parameter of the medium between conductive features from high (solid dielectric) to low (air). This parameter change fundamentally reduces the capacitance value between adjacent conductors, thereby reducing power consumption and RC time constants without requiring increased spacing between features.
2Productivity
If the distance between conductive features is decreased to increase density, then the capacitance increases, but signal delays increase
Solution Approach 1:
The patent removes the solid dielectric material that creates high parasitic capacitance between conductive features. By extracting this harmful medium and replacing it with air gaps, the capacitance value is reduced, which directly decreases the RC time constant and signal propagation delays while maintaining high device density.
Solution Approach 2:
The invention changes the dielectric constant parameter of the intervening medium from high (solid dielectric) to low (air). This parameter modification reduces the capacitive effect between adjacent conductors, thereby reducing signal delays and improving performance in high-density configurations.
3Loss of energy
If air gaps are formed between conductive features, then parasitic capacitance is reduced, but device complexity increases
Solution Approach 1:
The patent incorporates air gap formation into the existing multi-ILD fabrication sequence by adding sacrificial layers at strategic points. The air gaps are created as a byproduct of forming subsequent dielectric layers over recessed regions, rather than requiring separate air gap etching or formation steps. This preliminary structuring minimizes additional process complexity.
Solution Approach 2:
The patent uses sacrificial layers as intermediary materials that temporarily occupy space during fabrication and are later removed to create air gaps. These sacrificial layers (such as silicon nitride or oxide) serve as placeholders that define future air gap locations and are selectively removed after surrounding structures are formed, simplifying the overall air gap creation process.
Data Source
AI summary
In a method of manufacturing a semiconductor device, a source/drain structure is formed over a substrate, a first interlayer dielectric (ILD) layer including one or more dielectric layers is formed over the source/drain structure, a first opening is formed in the first ILD layer to at least partially expose the source/drain structure, a sacrificial layer is formed on an inner wall of the first opening, a first insulating layer is formed on the sacrificial layer, a conductive layer is formed on the first insulating layer so as to form a source/drain contact in contact with the source/drain structure, the sacrificial layer is removed to form a space between the first insulating layer and the first ILD layer, and a second insulating layer is formed over the source/drain contact and the first ILD layer to cap an upper opening the space, thereby forming an air gap.