Source/Drain Contact Air Gap Structure for Lower Parasitic Capacitance

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Solution Overview

Problem

As semiconductor devices evolve with higher performance and greater functionality, the increased density and reduced spacing between components lead to higher parasitic capacitance and RC time constants, resulting in increased power consumption and signal delays.

Innovation Solution

The formation of an air gap between insulating layers and conductive structures in semiconductor devices, achieved by creating a sacrificial layer within a contact opening and removing it to form a space capped by an insulating layer, reduces parasitic capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the distance between adjacent conductive features is decreased to increase device density, then the device functionality and performance are improved, but the parasitic capacitance increases leading to higher power consumption and signal delays

Engineering Contradiction:
Improvedevice densityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

An air gap is introduced as an intermediary layer between adjacent conductive features (such as between a conductive plug and conductive interconnect, or between adjacent interconnects). This air gap acts as a dielectric medium with lower permittivity than traditional solid dielectric materials, thereby reducing the parasitic capacitance between conductive elements while maintaining the required electrical isolation. The air gap can be formed by creating a void space during the fabrication process, for example by selectively removing a sacrificial layer or by controlling the deposition process to leave a void region.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the distance between adjacent conductive features is decreased to increase device density, then the device functionality and performance are improved, but the RC time constant increases leading to signal delays

Engineering Contradiction:
Improvedevice densityVSAvoidsignal delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The air gap serves as an intermediary dielectric layer that reduces both the capacitive component (C) and consequently the RC time constant of the interconnect structure. By placing low-permittivity air between conductive elements, the capacitance is reduced, which directly reduces the RC delay even when the physical distance between conductors is small, thus enabling high-density interconnect structures without proportionally increasing signal delays.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If traditional solid dielectric materials are used to insulate conductive features, then manufacturing is simplified, but parasitic capacitance is higher compared to air gap structures

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidparasitic capacitance
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The permittivity parameter of the dielectric material is changed from that of solid dielectric materials (typically 3-10) to that of air (approximately 1.0). This parameter change is achieved by creating an air gap structure through fabrication process modifications, such as forming a sacrificial layer that is later removed, or controlling atomic layer deposition to create void regions. The lower permittivity of air directly reduces parasitic capacitance while the fabrication process integrates this feature into existing manufacturing flows.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250218865A1Semiconductor device and manufacturing method thereof
Publication Date: 2025.07.03 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250218865A1 patent drawing
  • US20250218865A1 patent drawing
  • US20250218865A1 patent drawing

AI summary

In a method of manufacturing a semiconductor device, a source/drain structure is formed over a substrate, a first interlayer dielectric (ILD) layer including one or more dielectric layers is formed over the source/drain structure, a first opening is formed in the first ILD layer to at least partially expose the source/drain structure, a sacrificial layer is formed on an inner wall of the first opening, a first insulating layer is formed on the sacrificial layer, a conductive layer is formed on the first insulating layer so as to form a source/drain contact in contact with the source/drain structure, the sacrificial layer is removed to form a space between the first insulating layer and the first ILD layer, and a second insulating layer is formed over the source/drain contact and the first ILD layer to cap an upper opening the space, thereby forming an air gap.