Source/Drain Contact Interface Layout for Lower Contact Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices become more complex and smaller in size, they face challenges with increased parasitic capacitance and decreased operating speed, leading to reliability issues due to higher contact resistance between the contact electrode and the source/drain pattern.
Innovation Solution
The semiconductor device incorporates a contact interface layer with distinct first and second regions, where the first region is between the source/drain pattern and the contact electrode, and the second region extends along the upper surface of the source/drain pattern, reducing contact resistance by increasing the contact area between the contact electrode and the source/drain pattern.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the size of the transistor decreases to increase integration, then device complexity and functionality improve, but parasitic capacitance increases and operating speed decreases
Solution Approach 1:
The contact interface layer extends in multiple dimensions: vertically between the source/drain pattern and contact electrode, and horizontally along the upper surface of the source/drain pattern. This multi-dimensional extension increases the contact area without increasing the footprint area, thereby reducing contact resistance and improving operating speed while maintaining device integration.
2Reliability
If the contact area between contact electrode and source/drain pattern is increased to reduce contact resistance, then reliability improves, but device area increases
Solution Approach 1:
The contact interface layer utilizes the vertical dimension and lateral extension along the source/drain pattern surface to increase contact area. This approach reduces contact resistance and improves reliability without proportionally increasing the device footprint area, as the contact enhancement occurs primarily in the vertical and peripheral directions rather than expanding the overall device area.
3Reliability
If the contact interface layer extends along the upper surface of the source/drain pattern, then contact resistance decreases, but manufacturing complexity increases
Solution Approach 1:
The contact interface layer is formed before the contact electrode is deposited. This preliminary formation allows the interface layer to be deposited conformally on the source/drain pattern surface, and subsequent etching processes can selectively remove portions of the interface layer to create the desired contact geometry, simplifying the overall manufacturing process while achieving reduced contact resistance.
Solution Approach 2:
The contact interface layer is formed with specific material composition and thickness parameters that optimize both electrical contact properties and etching selectivity. By controlling the layer's physical and chemical parameters, the manufacturing process achieves the desired contact resistance reduction while maintaining processability and compatibility with existing fabrication steps.
Data Source
AI summary
A semiconductor device may include a substrate, a lower pattern on the substrate, a channel pattern on the lower pattern, a source/drain pattern on both sides of the channel pattern, a gate structure surrounding the channel pattern, a contact electrode electrically connected to the source/drain pattern, an etch stop layer between the gate structure and the contact electrode, and a contact interface layer on the source/drain pattern. The contact interface layer may include a first region between the source/drain pattern and the contact electrode and a second region between the source/drain pattern and the etch stop layer.