Source/Drain Contact Structure for Multi-Bridge-Channel Transistors

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Solution Overview

Problem

The high packing density of multi-bridge-channel (MBC) transistors poses challenges in forming satisfactory power and signal routing structures, as existing source/drain contact structures are not adequate to meet the increased complexity and density requirements.

Innovation Solution

The use of different contact structure schemes, including dual interconnect structures, hybrid fins with embedded conductive features, and offset device stacking, to achieve flexibility and density in power and signal routing, such as coupling source features to power rails through backside and top interconnect structures, and embedding conductive features in hybrid fins to provide conductive pathways.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multi-bridge-channel (MBC) transistors are implemented to increase device packing density, then functional density is improved, but power and signal routing becomes more complex and difficult to form

Engineering Contradiction:
Improvedevice packing densityVSAvoidpower and signal routing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The contact structure is divided into multiple discrete components: individual contact openings for each source/drain region, separate conductive plugs, and distinct interconnect layers. This segmentation allows each element to be formed and optimized independently, managing the complexity of routing in high-density MBC transistor configurations

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes vertical stacking of multiple interconnect layers and contact structures to route power and signal connections. By transitioning from planar routing to three-dimensional vertical interconnection, the design accommodates high packing density while maintaining manageable routing complexity through additional spatial dimensions

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If existing source/drain contact structures are used, then manufacturing is simpler, but they are not satisfactory in meeting the increased complexity and density requirements

Engineering Contradiction:
Improvecontact structure fabricationVSAvoidrouting structure adequacy
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Contact openings are formed through the interlayer dielectric material before subsequent interconnect layers are deposited. This preliminary formation of contact structures establishes the routing pathways in advance, allowing later layers to be configured optimally for high-density MBC transistor applications

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The contact structure employs composite material architecture including conductive plugs (such as tungsten or copper), dielectric materials for isolation, and metal interconnect layers. This composite structure provides both the electrical conductivity needed for high-density routing and the manufacturing compatibility required for practical fabrication

Inventive Principle:
Principle #40Composite materials

Data Source

PatentUS11532627B2Source/drain contact structure
Publication Date: 2022.12.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11532627B2 patent drawing
  • US11532627B2 patent drawing
  • US11532627B2 patent drawing

AI summary

A semiconductor device according to the present disclosure includes a first interconnect structure, a first transistor over the first interconnect structure, a second transistor over the first transistor, and a second interconnect structure over the second transistor. The first transistor includes first nanostructures and a first source region adjoining the first nanostructures. The second transistor includes second nanostructures and a second source region adjoining the second nanostructures. The first source region is coupled to a first power rail in the first interconnect structure, and the second source region is coupled to a second power rail in the second interconnect structure.