Source/Drain Contact Plug Structure for Lower Resistance GAA Transistors
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Solution Overview
Problem
The increasing demand for high-performance, high-speed, and multifunctional semiconductor devices requires a higher degree of integration, which poses challenges in manufacturing fine patterns and overcoming limitations in operating characteristics due to the decrease in size of planar metal oxide semiconductor field effect transistors (MOSFETs).
Innovation Solution
The semiconductor device incorporates a substrate with an active region, a gate structure intersecting the active region, multiple channel layers surrounded by the gate structure, source/drain regions connected to the channel layers, and contact plugs with a metal-semiconductor compound layer and a contact conductor layer. The contact plugs have a metal-semiconductor compound layer with different thicknesses on the side surface and bottom surface, enhancing electrical connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the degree of integration is increased to meet high-performance demands, then device functionality and speed improve, but manufacturing complexity and difficulty of implementing fine patterns increase
Solution Approach 1:
The contact plug is divided into multiple functional layers: a metal-semiconductor compound layer and a contact conductor layer. This segmentation allows each layer to perform its specific function optimally - the compound layer provides metallurgical bonding with the semiconductor while the conductor layer provides low-resistance electrical connection, thereby simplifying the manufacturing process for fine patterns while maintaining high device performance
Solution Approach 2:
The metal-semiconductor compound layer is formed with different thicknesses at different locations - thicker at the interface with the semiconductor region and thinner toward the upper contact conductor layer. This local variation in thickness optimizes the electrical characteristics at each interface while facilitating the overall integration process
2Area of stationary object
If the size of planar metal oxide semiconductor field effect transistors is decreased to increase integration, then device density improves, but operating characteristics and electrical performance deteriorate
Solution Approach 1:
The contact structure uses a composite material system consisting of a metal-semiconductor compound layer (formed by reaction between metal and semiconductor materials) and a contact conductor layer. This composite structure provides both the electrical performance needed for small-scale devices and the mechanical stability required for high-density integration, thereby improving operating characteristics while maintaining high device density
3Reliability
If contact resistance is reduced to improve electrical characteristics, then device performance improves, but contact structure complexity increases
Solution Approach 1:
The metal-semiconductor compound layer serves as an intermediary between the semiconductor region and the contact conductor layer. It provides a transition zone that facilitates low-resistance electrical connection while maintaining structural integrity, thereby reducing contact resistance without requiring overly complex contact structures
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the degree of integration and electrical characteristics of the semiconductor device by enabling efficient electrical connection and reducing contact resistance, thereby supporting high-performance operations.
Implementation Method 1
the contact plug including a metal-semiconductor compound layer along a recessed surface of the source/drain region and a contact conductor layer on the metal-semiconductor compound layer
Data Source
AI summary
A semiconductor device includes a substrate including an active region, a gate structure on the substrate, a plurality of channel layers on the active region, spaced apart from each other and surrounded by the gate structure, a source/drain region in a region at which the active region is recessed, on at least one side of the gate structure, and connected to the channel layers, and a contact plug partially recessing the source/drain region from an upper surface of the source/drain region, electrically connected to the source/drain region, and including a metal-semiconductor compound layer along a recessed surface of the source/drain region and a contact conductor layer on the metal-semiconductor compound layer, wherein the metal-semiconductor compound layer has a first thickness on a side surface of the contact conductive layer and a second thickness on a bottom surface of the contact plug, the second thickness being smaller than the first thickness.


