Source/Drain Contact Structure With Exposed Corner Edge Silicide
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Solution Overview
Problem
Current semiconductor devices face challenges in maintaining high electrical reliability and preventing electrical shorts due to the complexity of source/drain patterns and the need for increased contact areas with active contacts.
Innovation Solution
The semiconductor device incorporates a source/drain pattern with a body part and a capping pattern, where the capping pattern exposes corner edges and includes a silicide layer to enhance contact area and prevent shorts, while maintaining the source/drain pattern's maximum width.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the source/drain pattern complexity is increased to improve electrical characteristics, then the electrical reliability is improved, but the device complexity increases
Solution Approach 1:
The source/drain pattern is segmented into multiple semiconductor patterns arranged in parallel, with each pattern providing a separate current path. This segmentation increases the total contact area and electrical reliability while maintaining manageable complexity through modular structure
Solution Approach 2:
The invention transitions from a single-planar source/drain contact to a multi-layered structure with semiconductor patterns stacked vertically and connected through vias to different metal interconnect layers. This dimensional expansion increases contact area without proportionally increasing planar footprint
2Reliability
If the contact area between source/drain pattern and active contact is increased to reduce resistance, then the electrical characteristics are improved, but the area occupied by the source/drain pattern increases
Solution Approach 1:
The source/drain pattern utilizes vertical stacking with multiple semiconductor patterns arranged in layers, connected through vias to different metal interconnect levels. This three-dimensional configuration increases the effective contact area and conductivity pathways without proportionally increasing the horizontal footprint on the substrate
Solution Approach 2:
The source/drain structure employs composite material architecture combining multiple semiconductor patterns with different properties, metal interconnects, and dielectric materials. This composite structure optimizes electrical conductivity and contact area while controlling the overall spatial occupation through material selection and layering
Data Source
AI summary
A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.