Source/Drain Dopant Cluster Structure for Etch Damage Reduction
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Solution Overview
Problem
The continuous scaling down of semiconductor device dimensions and the increasing demand for device performance lead to challenges such as etching damage and gate-S/D short defects in nanostructure transistors, which affect device performance and yield.
Innovation Solution
The formation of a source/drain structure with a dopant cluster in semiconductor devices, where a second epitaxial layer includes a cluster of dopant extending along the channel structure direction, significantly increasing the dopant concentration in specific areas. This approach reduces etching damage and gate-S/D short defects by enhancing the etch resistance of the source/drain structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional source/drain structures are used in scaled-down semiconductor devices, then device dimensions can be reduced, but etching damage and gate-S/D short defects increase
Solution Approach 1:
The patent applies local quality by creating a dopant cluster with significantly higher dopant concentration in specific regions of the source/drain structure. The second epitaxial layer contains a dopant cluster extending along the channel structure direction, with dopant concentration at least ten times greater than in other regions. This localized high-concentration dopant region enhances etch resistance precisely where needed to prevent gate-S/D short defects, while allowing the rest of the device to continue scaling down.
Solution Approach 2:
The patent utilizes parameter changes by varying the dopant concentration across different regions of the source/drain structure. The dopant concentration is changed from a uniform distribution to a non-uniform distribution with a high-concentration cluster. Specifically, the dopant concentration in the cluster is at least ten times greater than in the surrounding regions, which fundamentally changes the etch resistance parameter in critical areas without affecting other device parameters.
2Reliability
If dopant concentration is increased in source/drain structures, then etch resistance improves, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the source/drain structure into multiple epitaxial layers with distinct functions. The structure includes a first epitaxial layer, a second epitaxial layer containing the dopant cluster, and a third epitaxial layer. This segmentation allows the dopant cluster to be isolated in a specific layer, making the complexity localized and manageable while achieving the desired etch resistance improvement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of dopant clusters in the source/drain structures effectively reduces etching damage and gate-S/D short defects, thereby improving the performance and yield of semiconductor devices by maintaining device integrity and functionality.
Implementation Method 1
a second epitaxial layer on the first epitaxial layer and sidewalls of the channel structure. The second epitaxial layer includes a cluster of a dopant extending along a direction of the channel structure
Data Source
AI summary
The present disclosure describes a semiconductor device having a source/drain structure with a dopant cluster. The semiconductor device includes a channel structure on a substrate and a source/drain structure on the substrate and adjacent to the channel structure. The source/drain structure includes a first epitaxial layer on the substrate, a second epitaxial layer on the first epitaxial layer and sidewalls of the channel structure, and a third epitaxial layer on the second epitaxial layer. The second epitaxial layer includes a cluster of a dopant extending along a direction of the channel structure.