Source/Drain Layered Doping Structure for Low-Resistance IC Contacts
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Solution Overview
Problem
Existing integrated circuit devices face challenges in achieving improved electrical characteristics due to limitations in the structure and doping concentration of source/drain regions.
Innovation Solution
The integrated circuit device incorporates a multi-layered source/drain structure with a source/drain barrier layer, a source/drain body layer, and a source/drain capping layer, where the doping concentration of the capping layer is higher than that of the body layer, and the body layer's doping concentration is higher than that of the barrier layer. Additionally, the source/drain capping layer includes a pointed portion to reduce defects during epitaxial growth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a multi-layered source/drain structure with graded doping concentration is implemented, then electrical resistance is reduced and electrical characteristics are improved, but device complexity increases
Solution Approach 1:
The source/drain region is divided into multiple distinct layers (barrier layer, body layer, capping layer) with progressively increasing doping concentrations. This segmentation allows each layer to perform specific functions: the barrier layer prevents dopant diffusion, the body layer provides moderate conductivity, and the capping layer with highest doping concentration minimizes contact resistance, collectively improving electrical characteristics while managing complexity through functional specialization
Solution Approach 2:
Different regions of the source/drain structure are assigned different doping concentrations tailored to their specific functional requirements. The barrier layer has low doping concentration to prevent unwanted diffusion, the body layer has intermediate doping for balanced properties, and the capping layer has high doping concentration specifically at the contact interface to reduce electrical resistance. This localized optimization of material properties resolves the contradiction by improving electrical characteristics only where most needed
2Manufacturing precision
If the source/drain capping layer includes a pointed portion to reduce defects during epitaxial growth, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The source/drain capping layer is designed with a pointed portion (protruding in the first horizontal direction) before the actual epitaxial growth process begins. This pre-formed geometric feature serves as a nucleation site that guides and controls the subsequent epitaxial growth, ensuring uniform crystal structure and reducing defects. By preparing this geometric configuration in advance, the patent improves manufacturing precision without requiring complex real-time control during growth
Solution Approach 2:
The pointed portion of the capping layer introduces a specific curved or tapered geometry that facilitates controlled epitaxial growth. This geometric feature creates favorable surface conditions for crystal nucleation and growth, promoting uniform material deposition and reducing structural defects. The curvature or tapering of the pointed portion is specifically designed to optimize the growth front stability during epitaxial processing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces electrical resistance and enhances the reliability of the integrated circuit device by minimizing defects in the source/drain capping layer, thereby improving overall performance.
Implementation Method 1
a doping concentration of the source/drain capping layer is greater than a doping concentration of the source/drain body layer
Implementation Method 2
the source/drain capping layer includes a pointed portion to reduce defects during epitaxial growth
Data Source
AI summary
The present disclosure provides an integrated circuit device including a plurality of device isolation films, a plurality of gate lines disposed on the plurality of device isolation films, a first source/drain region and a second source/drain region respectively disposed between the plurality of gate lines, wherein each of the first source/drain region and the second source/drain region includes a source/drain barrier layer, a source/drain body layer on the source/drain barrier layer, and a source/drain capping layer on the source/drain body layer, wherein a doping concentration of the source/drain capping layer is greater than a doping concentration of the source/drain body layer, the doping concentration of the source/drain body layer is greater than a doping concentration of the source/drain barrier layer, and the source/drain capping layer includes a pointed portion.