Source/Drain Epitaxial Stack for Low-Heat Dopant Activation

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Solution Overview

Problem

Dopant activation in semiconductor source/drain regions is challenging due to the size of transistors shrinking, leading to heat spread from laser annealing affecting fin deformation and dopant activation efficiency.

Innovation Solution

Formation of source/drain epitaxial stacks with a low-melting point amorphous top layer and a high-melting point single-crystalline bottom layer, using a reduced power laser beam to control the molten front within the top layer and minimize fin deformation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If laser annealing is used to activate dopants in source/drain regions, then dopant activation efficiency is improved, but heat spread causes fin deformation

Engineering Contradiction:
Improvedopant activation efficiencyVSAvoidfin deformation
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the physical state parameter of the source/drain epitaxial layer from crystalline to amorphous, which fundamentally alters the thermal response characteristics. The amorphous layer has different thermal conductivity and heat capacity compared to crystalline structures, enabling better heat confinement during laser annealing and reducing thermal damage to the fin while maintaining dopant activation efficiency.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent utilizes the phase transition properties of amorphous materials during laser annealing. The amorphous source/drain layer undergoes controlled phase transition during the laser heating process, which helps confine the molten front within the source/drain region and prevents heat spread to the fin, thereby resolving the contradiction between activation efficiency and fin deformation.

Inventive Principle:
Principle #36Phase transitions

2Productivity

If laser power is increased to improve dopant activation, then activation efficiency increases, but heat impact on fin increases causing deformation

Engineering Contradiction:
Improvedopant activation efficiencyVSAvoidheat impact on fin
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

By changing the material state from crystalline to amorphous, the patent modifies the thermal parameters (conductivity, capacity, expansion) of the source/drain layer. This allows for more efficient energy coupling during laser annealing, achieving better dopant activation with lower laser power, thereby reducing the harmful heat impact on the fin structure.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Achieves efficient dopant activation with reduced heat impact on the fin, maintaining transistor integrity and enhancing dopant concentration in the top layer while minimizing diffusion into the fin.

Implementation Method 1

using a reduced power laser beam to control the molten front within the top layer

Methodology Applied
Scientific EffectLaser heating: Laser

Implementation Method 2

control the molten front within the top layer

Methodology Applied
Scientific EffectMelting: Melting

Implementation Method 3

Thermal energy can be provided to a doped semiconductor material to move the dopants from interstitial space to crystal sites, a process referred to as 'activation' or 'crystal activation'

Methodology Applied
Scientific EffectThermal activation: Annealing

Data Source

PatentUS12446268B2Source and drain epitaxial layers
Publication Date: 2025.10.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12446268B2 patent drawing
  • US12446268B2 patent drawing
  • US12446268B2 patent drawing

AI summary

The present disclosure is directed to semiconductor structures with source/drain epitaxial stacks having a low-melting point top layer and a high-melting point bottom layer. For example, a semiconductor structure includes a gate structure disposed on a fin and a recess formed in a portion of the fin not covered by the gate structure. Further, the semiconductor structure includes a source/drain epitaxial stack disposed in the recess, where the source/drain epitaxial stack has bottom layer and a top layer with a higher activated dopant concentration than the bottom layer.