Source/Drain Epitaxial Cleaning for Uniform Profiles

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Solution Overview

Problem

The scaling down of semiconductor devices introduces short-channel effects and epitaxial defects in source/drain epitaxial structures, leading to reduced device performance and process yield due to residual gases and non-uniform profiles, which are challenging to address with existing cleaning processes.

Innovation Solution

Implementing optimized cleaning processes that include cleaning the epitaxial growth chamber at elevated temperatures, baking the wafer in a hydrogen environment, and using etching gases with lower flow rates and shorter times to reduce residual gases and defects, followed by a pumping process to further improve epitaxial structure uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If conventional cleaning processes are used, then device scaling is enabled, but epitaxial defects and non-uniform profiles occur due to residual gases

Engineering Contradiction:
Improvedevice dimensionsVSAvoidepitaxial structure uniformity
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The chamber is cleaned with a first etching gas before wafer introduction, and the wafer is baked in a hydrogen environment beforehand, to remove residual gases and contaminants in advance of the epitaxial growth process, preventing defects during scaling

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cleaning process uses elevated temperatures and specific etching gas flow rates to optimize residual gas removal, while the epitaxial growth uses controlled temperature and pressure parameters to maintain uniformity despite device scaling

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If extended etching processes are used to remove residual gases, then cleaner epitaxial structures are achieved, but process time increases

Engineering Contradiction:
Improveepitaxial structure cleanlinessVSAvoidprocess time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

A flush of etching gas is applied during epitaxial growth to remove residual gases, using shorter duration and lower flow rate than conventional cleaning, achieving sufficient cleanliness without excessive process time extension

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The cleaning and growth processes are integrated continuously, with the chamber and wafer cleaned in preparation for immediate epitaxial growth, eliminating idle time and maintaining process efficiency

Inventive Principle:
Principle #20Continuity of useful action

3Speed

If higher etching gas flow rates are used, then residual gases are removed faster, but epitaxial structure uniformity deteriorates

Engineering Contradiction:
Improveresidual gas removal rateVSAvoidepitaxial structure uniformity
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

A flush of etching gas with lower flow rate is used during epitaxial growth to remove residual gases without disrupting the uniform deposition, achieving sufficient cleaning while maintaining structure uniformity

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The etching gas is applied in periodic flushes during the epitaxial growth process, allowing controlled removal of residual gases at intervals rather than continuous high-flow exposure, preserving uniformity

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces epitaxial defects, improves the uniformity of source/drain epitaxial structures, and increases process yield by 5% to 20% by minimizing dimension and profile variations, thereby enhancing device performance.

Implementation Method 1

cleaning the chamber with a first etching gas

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

baking the wafer in a hydrogen environment

Methodology Applied
Scientific EffectBaking (thermal treatment): Heat Treatment

Implementation Method 3

cleaning the wafer and the chamber with a flush of a second etching gas different from the first etching gas

Methodology Applied
Scientific EffectEtching:

Implementation Method 4

a pumping process to further improve epitaxial structure uniformity

Methodology Applied
Scientific EffectVacuum pumping: Pump

Implementation Method 5

depositing a first epitaxial layer on the wafer with a precursor

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20240096646A1Cleaning process for source/drain epitaxial structures
Publication Date: 2024.03.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240096646A1 patent drawing
  • US20240096646A1 patent drawing
  • US20240096646A1 patent drawing

AI summary

The present disclosure describes a method of forming an epitaxial layer on a substrate in a chamber. The method includes cleaning the chamber with a first etching gas and depositing the epitaxial layer on the substrate. Deposition of the epitaxial layer includes epitaxially growing a first portion of the epitaxial layer with a precursor, cleaning the substrate and the chamber with a flush of a second etching gas different from the first etching gas, and epitaxially growing a second portion of the epitaxial layer with the precursor. The first portion and the second portion have the same composition. The method furthers includes etching a portion of the epitaxial layer with a third etching gas having a flow rate higher than that of the second etching gas.