Source/Drain Epitaxial Stack for Dopant Activation Without Fin Deformation
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Solution Overview
Problem
Dopant activation in semiconductor source/drain regions is challenging due to the size of transistors shrinking, leading to fin deformation and inefficient dopant activation during laser annealing processes.
Innovation Solution
Formation of source/drain epitaxial stacks with a low-melting point amorphous top layer and a high-melting point single-crystalline bottom layer, using a reduced power laser beam to control the molten front and minimize fin deformation, while ensuring high dopant activation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If laser annealing is used to activate dopants in source/drain regions, then dopant activation is achieved, but fin deformation occurs and dopant diffusion is prevented inefficiently
Solution Approach 1:
The patent changes the physical state parameter of the source/drain epitaxial layers from crystalline to amorphous. This parameter change lowers the melting point of the material, allowing laser annealing to be performed at reduced temperatures and powers. The amorphous structure enables efficient dopant activation while minimizing thermal damage to the fin structure and preventing unwanted dopant diffusion, thus resolving the contradiction between dopant activation efficiency and fin deformation control.
Solution Approach 2:
The patent utilizes the phase transition properties of silicon by forming amorphous source/drain epitaxial layers instead of crystalline ones. The amorphous phase has a lower melting point and different thermal properties compared to the crystalline phase. During laser annealing, the amorphous material undergoes controlled phase transition that facilitates dopant activation while the lower temperature required prevents fin deformation and dopant diffusion, effectively resolving the technical contradiction.
2Productivity
If transistor size is reduced to improve integration density, then productivity increases, but dopant activation becomes less efficient and fin deformation increases
Solution Approach 1:
The patent applies parameter changes by transforming the source/drain material from crystalline to amorphous phase. This fundamental parameter change enables effective dopant activation in miniaturized transistors where conventional crystalline structures fail. The amorphous structure's lower melting point allows controlled laser annealing at reduced temperatures, ensuring reliable dopant activation even in highly scaled devices, thus maintaining productivity while improving reliability.
3Manufacturing precision
If reduced power laser beam is used to minimize fin deformation, then manufacturing precision improves, but dopant activation efficiency decreases
Solution Approach 1:
The patent resolves this contradiction by changing the material parameter from crystalline to amorphous. The amorphous source/drain epitaxial layers have a significantly lower melting point than crystalline silicon, allowing the use of reduced power laser beams for annealing. This parameter change enables sufficient dopant activation at lower temperatures that preserve fin structure integrity, thus achieving both manufacturing precision and dopant activation efficiency simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Achieves efficient dopant activation with minimized fin deformation, maintaining transistor electrical characteristics and preventing dopant diffusion, thereby improving integrated circuit fabrication.
Implementation Method 1
Thermal energy can be provided to a doped semiconductor material to move the dopants from interstitial space to crystal sites, a process referred to as 'activation' or 'crystal activation'
Implementation Method 2
Thermal energy can be provided to a doped semiconductor material to move the dopants from interstitial space to crystal sites
Implementation Method 3
Formation of source/drain epitaxial stacks with a low-melting point amorphous top layer and a high-melting point single-crystalline bottom layer, using a reduced power laser beam to control the molten front
Implementation Method 4
achieves efficient dopant activation with minimized fin deformation
Data Source
AI summary
The present disclosure is directed to semiconductor structures with source/drain epitaxial stacks having a low-melting point top layer and a high-melting point bottom layer. For example, a semiconductor structure includes a gate structure disposed on a fin and a recess formed in a portion of the fin not covered by the gate structure. Further, the semiconductor structure includes a source/drain epitaxial stack disposed in the recess, where the source/drain epitaxial stack has bottom layer and a top layer with a higher activated dopant concentration than the bottom layer.