Integrated Circuit Source/Drain Facets for Nanosheet Contact Resistance

Solution Overview

Problem

The challenge in nanosheet field-effect transistors is to enhance the performance and reliability by reducing contact resistance and improving the distribution of electrical characteristics as integrated circuit devices scale down.

Innovation Solution

The integrated circuit device incorporates a fin-type active region with nanosheets and a source/drain region comprising stacked lower and upper main body layers, where the top surface of the lower main body layer has declining facets and the upper main body layer has intersecting facets, ensuring uniform shape and size of the source/drain regions, thereby reducing contact resistance and enhancing electrical characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the size of integrated circuit devices is decreased to increase integration density, then the integration density is improved, but the contact resistance of source/drain regions increases and electrical characteristics become non-uniform

Engineering Contradiction:

Improveintegration densityVSAvoidcontact resistance

Core Design Contradiction:

Quantity of substanceVSReliability

Solution Approach 1:

The source/drain region is transformed from a conventional planar structure to a three-dimensional stacked structure comprising lower and upper main body layers. This vertical stacking in the third dimension increases the effective contact area with nanosheets without expanding the lateral footprint, thereby reducing contact resistance while maintaining high integration density

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The source/drain region is divided into multiple discrete layers (lower main body layer and upper main body layer) that can be independently formed and optimized. This segmentation allows each layer to be precisely controlled for uniform shape and size, ensuring consistent electrical characteristics across the device

Inventive Principle:

Principle #1Segmentation

2Quantity of substance

If the size of integrated circuit devices is decreased to increase integration density, then the integration density is improved, but the uniformity of electrical characteristics deteriorates

Engineering Contradiction:

Improveintegration densityVSAvoiduniformity of electrical characteristics

Core Design Contradiction:

Quantity of substanceVSManufacturing precision

Solution Approach 1:

The source/drain region is divided into multiple discrete layers (lower main body layer and upper main body layer) that can be independently formed and optimized. This segmentation allows each layer to be precisely controlled for uniform shape and size, ensuring consistent electrical characteristics across the device

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention controls critical parameters including the thickness of each main body layer, the facet angles, and the vertical positioning to ensure uniformity. By precisely controlling these geometric parameters, the electrical characteristics are standardized across all devices in the integrated circuit

Inventive Principle:

Principle #35Parameter changes

3Device complexity

If a conventional planar source/drain structure is used, then the device structure is simple, but the contact resistance is high and electrical performance is limited

Engineering Contradiction:

Improvesource/drain structureVSAvoidcontact resistance

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The source/drain region is transformed from a conventional planar structure to a three-dimensional stacked structure comprising lower and upper main body layers. This vertical stacking in the third dimension increases the effective contact area with nanosheets without expanding the lateral footprint, thereby reducing contact resistance while maintaining high integration density

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The source/drain region incorporates inclined facets on its surfaces, creating curved or angled interfaces rather than flat planes. These curved surfaces improve the geometric fit and contact area with the nanosheets, enhancing electrical connection and reducing contact resistance

Inventive Principle:

Principle #14Spheroidality (Curvature)

Data Source

PatentUS20250287656A1Integrated circuit device

Publication Date: 2025.09.11 SAMSUNG ELECTRONICS CO LTD

AI summary

An integrated circuit device includes a fin-type active region on a substrate; at least one nanosheet having a bottom surface facing the fin top; a gate line on the fin-type active region; and a source/drain region on the fin-type active region, adjacent to the gate line, and in contact with the at least one nanosheet, wherein the source/drain region includes a lower main body layer and an upper main body layer, a top surface of the lower main body layer includes a lower facet declining toward the substrate as it extends in a direction from the at least one nanosheet to a center of the source/drain region, and the upper main body layer includes a bottom surface contacting the lower facet and a top surface having an upper facet. With respect to a vertical cross section, the lower facet extends along a corresponding first line and the upper facet extends along a second line that intersects the first line.