Source/Drain Contact Structure With Inlaid Hard Mask Etching
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Solution Overview
Problem
The challenge in semiconductor manufacturing lies in forming source/drain contact openings for densely packed features, which requires high overlay precision and high-aspect-ratio etching, leading to reduced process windows and increased contact resistance due to the tapering of contact openings and smaller landing areas.
Innovation Solution
Replacing the top portion of the source/drain contact cut feature with a hard mask layer, allowing for selective etching of the interlayer dielectric layer, thereby eliminating the need for high-aspect-ratio etching and improving the contact landing area by inlaying the hard mask into the ILD layer rather than depositing it over the top surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high-aspect-ratio etching is used to form contact openings for densely packed source/drain features, then overlay precision is improved, but contact resistance increases due to tapering and smaller landing areas
Solution Approach 1:
Instead of forming contact openings through high-aspect-ratio etching from the top down (which causes tapering), the patent inlays the hard mask into the ILD layer first, then performs selective etching. This inverted approach eliminates the tapering problem and reduces contact resistance while maintaining the needed precision for densely packed features
2Ease of manufacture
If conventional source/drain contact formation is used, then existing manufacturing techniques are adequate, but process windows are reduced and contact resistance increases
Solution Approach 1:
The patent introduces a hard mask layer as an intermediary element that is inlaid into the ILD layer. This hard mask serves as a mediator that enables selective etching of the ILD layer to form contact openings, thereby improving process windows and reducing contact resistance while maintaining ease of manufacture through modified conventional techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances process windows and contact landing areas, reducing contact resistance and improving the efficiency of source/drain contact formation in semiconductor devices.
Implementation Method 1
selective etching of the interlayer dielectric layer
Data Source
AI summary
A method according to the present disclosure includes receiving a workpiece that includes a gate structure, a first gate spacer feature, a second gate spacer feature, a gate-top dielectric feature over the gate structure, the first gate spacer feature and the second gate spacer feature, a first source/drain feature over a first source/drain region, a second source/drain feature over a second source/drain region, a first dielectric layer over the first source/drain feature, and a second dielectric layer over the second source/drain feature. The method further includes replacing a top portion of the first dielectric layer with a first hard mask layer, forming a second hard mask layer over the first hard mask layer while the second dielectric layer is exposed, etching the second dielectric layer to form a source/drain contact opening and to expose the second source/drain feature, and forming a source/drain contact over the second source/drain feature.