Source-Drain Conductor Layout for Lower RC Delay in AOI Cells

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The miniaturization of integrated circuits poses design and manufacturing challenges, particularly in ensuring accurate layout designs and reducing stray capacitive couplings and RC delays, which are not effectively addressed by existing electronic design automation tools.

Innovation Solution

The proposed solution involves an And-Or-Inverter cell (AOI cell) design with conductor segments of varying lengths, where the separation distances between proximal edges of conductor segments are defined by the height of mask openings, allowing for reduced conductor lengths and improved integration with power rails, thereby minimizing stray capacitive couplings and RC delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conductor segment lengths are reduced to minimize stray capacitive couplings and RC delays, then speed performance is improved, but manufacturing precision requirements become stricter

Engineering Contradiction:

Improvespeed performanceVSAvoidconductor segment length precision

Core Design Contradiction:

SpeedVSManufacturing precision

Solution Approach 1:

The terminal conductor is divided into multiple conductor segments by removing exposed portions through etching processes. This segmentation allows each conductor segment to be independently optimized for length, enabling reduced lengths that minimize stray capacitive couplings and RC delays while maintaining manufacturability through standardized separation distances at proximal edges

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different conductor segments are positioned at different distances from power rails, creating local variations in conductor length and spacing. This local quality optimization allows each segment to be tailored for minimal RC delay and capacitive coupling in its specific location, improving overall speed performance without requiring uniform high-precision manufacturing across all conductors

Inventive Principle:

Principle #3Local quality

2Object-generated harmful factors

If conductor segments are positioned closer to power rails to reduce length, then stray capacitive couplings are minimized, but design complexity increases

Engineering Contradiction:

Improvestray capacitive couplingsVSAvoiddesign complexity

Core Design Contradiction:

Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The design optimizes conductor segment parameters by varying distances from power rails and adjusting segment lengths. This parameter optimization reduces stray capacitive couplings and RC delays while EDA tools automatically manage the resulting design complexity, transforming a complex manual optimization problem into a standardized parameter-setting process

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS20240095433A1Arrangement of source or drain conductors of transistor

Publication Date: 2024.03.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

An integrated circuit includes a first conductor segment intersecting a first active-region structure at a source/drain region and a second conductor segment intersecting a second active-region structure at a source/drain region. The first conductor segment and the second conductor segment are separated at proximal edges by a separation distance. A distance from a first horizontal cell boundary to a proximal edge of the first conductor segment is larger than a distance from a second horizontal cell boundary to a proximal edge of the second conductor segment by a predetermined distance that is a fraction of the separation distance.