Differentiated Source-Drain Structures for Sub-10 nm Nanowire Scaling
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Solution Overview
Problem
The scaling of multi-gate transistors in integrated circuits faces challenges due to variability in conventional fabrication processes, limiting further miniaturization beyond the 10 nanometer node, and requires new methodologies or technologies to optimize performance and density.
Innovation Solution
The implementation of differentiated source and drain structures, including epitaxial growth and backside power delivery, along with self-aligned access features, to enhance device performance and reduce interconnect stress in tight spaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used for scaling multi-gate transistors, then manufacturing simplicity is maintained, but manufacturing precision deteriorates due to variability limiting further miniaturization beyond 10 nanometer node
Solution Approach 1:
The fabrication process is divided into separate stages: forming first and second source/drain structures with different materials, then selectively removing portions. This segmentation allows each structure to be optimized independently for precision while managing overall process complexity.
Solution Approach 2:
Different source and drain structures are created with distinct material compositions and properties tailored to specific device regions. The first source structure uses different materials than the second drain structure, allowing local optimization for varying performance requirements at different locations.
2Productivity
If transistor size is reduced to increase density, then productivity is improved, but manufacturing precision deteriorates due to process variability
Solution Approach 1:
The patent changes material parameters by using different semiconductor materials for source and drain structures, allowing independent optimization of each region's electrical properties. This enables maintaining precision control while scaling to higher densities.
Solution Approach 2:
The first source structure is formed and optimized before the second drain structure is created. This preliminary action allows each structure to be independently tuned for optimal performance before final integration, reducing variability in the scaled device.
3Manufacturing precision
If new methodologies are introduced to extend fabrication into sub-10 nanometer node, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The complex fabrication process is segmented into distinct steps: forming first source structure, forming second drain structure, and selective removal. This segmentation makes the complex sub-10 nanometer process more manageable and controllable.
Solution Approach 2:
Instead of forming a single unified source/drain structure, the patent inverts the approach by creating separate source and drain structures with different materials, then selectively removing portions. This inverted methodology enables precise control at sub-10 nanometer nodes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves device performance by optimizing spacer trimming, reducing power network resistance, and enabling more efficient interconnect integration, thereby addressing the limitations of current fabrication processes and enabling further miniaturization.
Implementation Method 1
epitaxial growth
Data Source
AI summary
Integrated circuit structures having differentiated source or drain structures are described. In an example, an integrated circuit structure includes first, second and third pluralities of horizontally stacked nanowires or fins, and first, second and third gate stacks. A first epitaxial source or drain structure is between the first plurality of horizontally stacked nanowires or fin and the second plurality of horizontally stacked nanowires or fin, the first epitaxial source or drain structure having a lateral width and a composition. A second epitaxial source or drain structure is between the second plurality of horizontally stacked nanowires or fin and the third plurality of horizontally stacked nanowires or fin, the second epitaxial source or drain structure having the composition of the first epitaxial source or drain structure, and the second epitaxial source or drain structure having a lateral width less than the lateral width of the first epitaxial source or drain structure.