Source/Drain Silicide Stack for Low-Resistance FinFET Contacts

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Solution Overview

Problem

In the semiconductor industry, particularly at sub-10 nm node sizes, the source-drain sheet resistance in semiconductor devices becomes significant, leading to increased contact resistance due to the agglomeration of titanium silicide during thermal processes in CMOS fabrication, which hampers device performance.

Innovation Solution

The use of nickel silicide (NiSix) and/or Ni-based silicide as an alternative to titanium silicide to reduce contact and sheet resistance between the source/drain epitaxial layer and the source/drain contact, leveraging its lower Schottky barrier height for p-type metal oxide semiconductor devices and higher barrier height for n-type devices to enhance contact efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If titanium silicide is used to reduce contact resistance, then contact resistance decreases, but agglomeration occurs during thermal processes leading to increased sheet resistance

Engineering Contradiction:
Improvecontact resistanceVSAvoidsheet resistance
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent changes the material parameter from titanium silicide to nickel silicide, which has different physical and chemical properties. Nickel silicide maintains lower contact resistance while exhibiting superior thermal stability that prevents agglomeration during subsequent thermal processes, thereby resolving the contradiction between achieving low contact resistance and maintaining composition stability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs a composite material approach by using nickel silicide as a compound material that combines the beneficial properties of low contact resistance with high thermal stability. This composite material solution allows the system to achieve both low contact resistance and resistance to agglomeration during thermal processing

Inventive Principle:
Principle #40Composite materials

2Reliability

If titanium silicide is used to reduce sheet resistance, then sheet resistance decreases, but agglomeration during thermal processes increases contact resistance

Engineering Contradiction:
Improvesheet resistanceVSAvoidcontact resistance
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent changes the material parameter from titanium silicide to nickel silicide, which has different physical and chemical properties. Nickel silicide maintains lower contact resistance while exhibiting superior thermal stability that prevents agglomeration during subsequent thermal processes, thereby resolving the contradiction between achieving low sheet resistance and maintaining composition stability

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of NiSix and Ni-based silicides effectively decreases contact resistance, improving device performance by minimizing sheet resistance and agglomeration issues associated with titanium silicide, thereby enhancing the manufacturing process for FinFET and GAA FET devices.

Implementation Method 1

leveraging its lower Schottky barrier height for p-type metal oxide semiconductor devices and higher barrier height for n-type devices to enhance contact efficiency

Methodology Applied
Scientific EffectSchottky barrier: Electrical Resistance

Data Source

PatentUS12170325B2Method of manufacturing a semiconductor device and a semiconductor device
Publication Date: 2024.12.17 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12170325B2 patent drawing
  • US12170325B2 patent drawing
  • US12170325B2 patent drawing

AI summary

In method of manufacturing a semiconductor device, a source/drain epitaxial layer is formed, one or more dielectric layers are formed over the source/drain epitaxial layer, an opening is formed in the one or more dielectric layers to expose the source/drain epitaxial layer, a first silicide layer is formed on the exposed source/drain epitaxial layer, a second silicide layer different from the first silicide layer is formed on the first silicide layer, and a source/drain contact is formed over the second silicide layer.