Source/Drain Thermal Conduction Layer for STI Heat Dissipation

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Solution Overview

Problem

Current semiconductor transistors face heat dissipation issues due to the poor thermal conductivity of silicon oxide materials at the source/drain region, leading to performance and reliability problems as heat generated by current flow or anneal processes cannot efficiently dissipate into the substrate.

Innovation Solution

Incorporating a thermal conductive layer with high thermal conductivity, such as BeO or AlN, at the source/drain region to facilitate efficient heat dissipation into the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If silicon oxide material is used at the source/drain region, then electrical insulation is provided, but thermal conductivity is poor leading to heat dissipation issues

Engineering Contradiction:
Improveelectrical insulationVSAvoidheat dissipation
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The isolation structure is segmented into multiple layers: a lower insulating layer (silicon oxide) providing electrical insulation, and an upper thermal conductive layer (silicon nitride or diamond-like carbon) providing heat dissipation. This segmentation allows each layer to perform its specialized function independently, resolving the contradiction between electrical insulation and thermal conductivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The isolation structure uses composite materials by combining silicon oxide (for insulation) with silicon nitride or diamond-like carbon (for thermal conduction). This composite approach allows the structure to simultaneously achieve both electrical insulation and effective heat dissipation, directly resolving the technical contradiction.

Inventive Principle:
Principle #40Composite materials

2Power

If heat is generated by source-to-drain current or anneal processes, then device operation is enabled, but heat dissipation efficiency is poor due to low thermal conductivity

Engineering Contradiction:
Improvedevice operationVSAvoidheat dissipation efficiency
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The upper thermal conductive layer acts as an intermediary between the heat-generating source/drain region and the substrate. It facilitates efficient heat transfer from the hot region to the substrate, enabling device operation while improving heat dissipation efficiency by providing a thermal pathway through the isolation structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If conventional isolation structures are used, then manufacturing is simple, but heat management capability is insufficient

Engineering Contradiction:
Improveisolation structure fabricationVSAvoidheat management
Core Design Contradiction:
Ease of manufactureVSTemperature

Solution Approach 1:

The thermal conductive layer is formed over the insulating layer during the isolation structure fabrication process, before subsequent device processing steps. This preliminary action ensures heat management capability is built into the structure early, while the overall process remains integrated with conventional manufacturing flows, maintaining ease of manufacture while improving heat management.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The thermal conductive layer effectively dissipates heat generated by the source-to-drain current and anneal processes, enhancing the performance and reliability of semiconductor devices by improving heat management.

Implementation Method 1

the thermal conductive layer effectively dissipates heat generated by the source-to-drain current and anneal processes

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS12191145B2Semiconductor device and formation method thereof
Publication Date: 2025.01.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12191145B2 patent drawing
  • US12191145B2 patent drawing
  • US12191145B2 patent drawing

AI summary

A method of forming a semiconductor device includes forming a semiconductor strip extending above a semiconductor substrate, forming shallow trench isolation (STI) regions on opposite sides of the semiconductor strip, recessing a portion of the semiconductor strip, etching the STI regions to form a recess in the STI regions, forming a first thermal conductive layer in the recess, forming a source/drain epitaxy structure on the first thermal conductive layer, and forming a gate stack across the semiconductor strip and extending over the STI regions.