Source/Drain Via Resistance Reduction via Selective Metal Growth
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Solution Overview
Problem
Conventional methods for forming source/drain vias in semiconductor devices require glue layers to ensure adhesion, which increase electrical resistance and can lead to peeling issues during polishing processes, adversely affecting device performance.
Innovation Solution
The formation of source/drain vias is achieved directly on the source/drain contact using a selective metal growth technique without glue layers, resulting in a laterally protruding bottom segment that enhances adhesion and reduces resistance by eliminating the high-resistance glue layer and providing a larger interface area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If glue layers are used to ensure adhesion in source/drain vias, then adhesion strength is improved, but electrical resistance increases
Solution Approach 1:
The patent removes the glue layer from the via structure entirely, replacing it with a direct metal-to-semiconductor contact. This extraction of the harmful intermediate layer simultaneously eliminates both the adhesion problem (by creating strong direct bonding) and the resistance problem (by removing the high-resistance material), resolving the technical contradiction.
Solution Approach 2:
The patent introduces a liner layer as an intermediary between the metal via and the semiconductor substrate. This liner layer serves as a mediation interface that provides both adhesion strength and low electrical resistance, replacing the problematic glue layer with a functional intermediate structure that satisfies both requirements.
2Strength
If glue layers are used to ensure adhesion, then adhesion is improved, but peeling occurs during polishing processes
Solution Approach 1:
By removing the glue layer that causes peeling during polishing, the patent eliminates the source of the problem. The direct metal-to-semiconductor contact with optional liner layer creates a structure that is inherently resistant to peeling, as there is no weak intermediate layer to fail during mechanical polishing processes.
3Productivity
If source/drain vias are made smaller with each technology generation, then device density is improved, but electrical resistance increases
Solution Approach 1:
The patent changes the material composition parameters of the via structure by eliminating the glue layer and using alternative materials (liner layer and metal combinations). This parameter change in material composition allows for lower resistance even as the via dimensions are reduced for higher device density, resolving the contradiction between scaling and resistance.
Data Source
AI summary
A source/drain is disposed over a substrate. A source/drain contact is disposed over the source/drain. A first via is disposed over the source/drain contact. The first via has a laterally-protruding bottom portion and a top portion that is disposed over the laterally-protruding bottom portion.