Source/Drain Bottom Isolation Layer With Voids for Leakage Blocking

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Solution Overview

Problem

The continuous scaling down of semiconductor devices leads to increased complexity and difficulty in process control, with leakage currents and dislocation defects in the source/drain structures, reducing device performance.

Innovation Solution

A semiconductor device design incorporating a source/drain bottom isolation layer with voids is introduced, which blocks leakage current paths and reduces dislocation defects by isolating the source/drain structures from the substrate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the dimensions of semiconductor devices are scaled down to increase storage capacity and processing speed, then device performance is improved, but manufacturing complexity and process control difficulty increase

Engineering Contradiction:

Improvestorage capacity and processing speedVSAvoidmanufacturing complexity and process control difficulty

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The isolation layer is segmented into multiple portions (first isolation layer portion, second isolation layer portion, third isolation layer portion) with different structures and functions. This segmentation allows each portion to be optimized independently for its specific function while maintaining overall device performance during scaling.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different regions of the isolation layer are assigned different properties: the first portion has a specific dielectric material for electrical isolation, the second portion has voids for mechanical stress relief, and the third portion provides structural support. This local differentiation addresses specific problems in different device regions without compromising overall scalability.

Inventive Principle:

Principle #3Local quality

2Productivity

If continuous scaling is pursued to meet performance demands, then device performance increases, but leakage currents and dislocation defects in source/drain structures increase

Engineering Contradiction:

Improvedevice performanceVSAvoidleakage current and dislocation defects

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The isolation layer acts as an intermediary structure between the source/drain structures and the substrate. It provides electrical isolation to block leakage current paths and mechanical isolation to reduce dislocation defects, thereby protecting the source/drain structures from harmful effects during scaling.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The isolation layer incorporates voids (porous regions) that serve multiple functions: reducing mechanical stress on the source/drain structures, providing thermal relief, and maintaining electrical isolation. The porous structure allows the isolation layer to accommodate dimensional changes during scaling while maintaining its isolation functions.

Inventive Principle:

Principle #31Porous materials

Data Source

PatentUS20250374584A1Source/drain bottom isolation layer with voids for semiconductor devices

Publication Date: 2025.12.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

The present disclosure describes a semiconductor device having a source/drain (S/D) bottom isolation layer with voids. The semiconductor device includes a stack of semiconductor layers on a substrate, a gate structure surrounding the stack of semiconductor layers, a S/D structure on the substrate and adjacent to the gate structure, and an isolation layer between the S/D structure and the substrate. The isolation layer encloses a void below the S/D structure.