Source Drive IC Random Signal Generator for EMI Reduction

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Solution Overview

Problem

Conventional display devices face challenges in minimizing electromagnetic interference (EMI) due to the peak current accumulation from source drive integrated circuits, which is difficult to predict and reduce, especially with varying display panel sizes and resolutions.

Innovation Solution

The implementation of a display device with source drive integrated circuits (ICs) that include a serial-to-parallel converter, a random signal generator, and a Source Output Enable (SOE) delay unit to randomly disperse the output timings of data voltages, reducing peak current and EMI by controlling the SOE signals differently across output groups and between ICs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If source drive ICs output data voltages simultaneously, then data transmission efficiency is improved, but peak current accumulates and EMI increases

Engineering Contradiction:
Improvedata transmission efficiencyVSAvoidpeak current and EMI
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent applies periodic action by using different Source Output Enable (SOE) signal timings for different output groups. The SOE signals are generated with different delays, causing the data voltage outputs to be distributed over time rather than occurring simultaneously. This periodic distribution reduces peak current accumulation while maintaining overall data transmission efficiency.

Inventive Principle:
Principle #19Periodic action

2Ease of manufacture

If SOE signal timing is fixed, then circuit design is simplified, but peak current cannot be effectively reduced

Engineering Contradiction:
Improvecircuit design simplicityVSAvoidpeak current
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent implements dynamics by making the SOE signal timings variable rather than fixed. Different output groups are assigned different SOE signal delays, creating a dynamic time distribution of output currents. This dynamic approach effectively reduces peak current while the delays are predetermined, maintaining reasonable design simplicity.

Inventive Principle:
Principle #15Dynamics

3Productivity

If multiple data lines are used for RGB transmission, then data transmission capability is improved, but PCB width increases

Engineering Contradiction:
Improvedata transmission capabilityVSAvoidPCB width
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent applies merging by combining multiple data transmission functions into a single data line. The timing controller transmits control data and video data through one shared data line to the source drive ICs, eliminating the need for separate R, G, B data transmission lines. This significantly reduces the number of required lines and PCB width while maintaining full data transmission capability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP3188171B1Display device, source drive integrated circuit, timing controller and driving method thereof
Publication Date: 2024.04.24 LG DISPLAY CO LTD
  • EP3188171B1 patent drawingFigure 1
  • EP3188171B1 patent drawingFigure 2
  • EP3188171B1 patent drawingFigure 3

AI summary

Provided are a display device and a driving method thereof. Each source drive integrated circuit (IC) of the display device includes a first random signal generator (RD) configured to generate a first random signal, a delay unit (SPL) configured to generate first and second Source Output Enable signals (SOE1, SOE2) by randomly delaying an SOE signal in response to the first random signal, a first output group (G1) configured to output a data voltage at a first timing in response to the first internal signal (SOE1), and a second output group (G2) configured to output a data voltage at a second timing in response to the second internal signal (SOE2). The present disclosure utilizes a random signal generator (RD) to randomly disperse timings of SOE signals temporally and spatially within a source drive IC (SIC) or between source drive ICs (SIC), thereby minimizing the peak current.