Source Driver Dual-Cache Interpolation for Horizontal Resolution Expansion
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Solution Overview
Problem
Existing display technologies face challenges in efficiently expanding the horizontal resolution of dual-gate pixel architectures, as conventional methods fail to effectively handle the reduced number of data signal lines and maintain seamless display performance.
Innovation Solution
A display apparatus with a source driver comprising a first cache module, a second cache module, an operation conversion module, and an output module, which caches initial data, calculates interpolation data, and outputs it to data signal lines, utilizing a dual-gate pixel architecture to enhance horizontal resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional display methods are used with reduced data signal lines, then device complexity is reduced, but horizontal resolution expansion capability deteriorates
Solution Approach 1:
The first cache module stores initial data in advance before it is needed for display output. This preliminary storage allows the system to process and interpolate data efficiently without requiring additional data signal lines, thereby maintaining low device complexity while enabling horizontal resolution expansion through subsequent interpolation operations.
Solution Approach 2:
The operation conversion module acts as an intermediary between the first cache module (storing initial data) and the second cache module (storing expanded data). It performs interpolation calculations to generate additional data points, effectively mediating the transformation from lower-resolution input data to higher-resolution output data without requiring increased hardware complexity.
2Manufacturing precision
If interpolation calculations are performed to expand horizontal resolution, then display quality is improved, but processing time increases
Solution Approach 1:
The system performs preliminary data storage in the first cache module before interpolation is needed. This allows the interpolation operation to work with pre-organized data, reducing the time required for resolution expansion while maintaining high display quality through accurate interpolation calculations.
Solution Approach 2:
The dual-cache architecture enables continuous processing where the first cache module continuously receives and stores incoming data while the operation conversion module continuously performs interpolation and the second cache module continuously prepares output data. This continuous pipeline operation minimizes processing delays and maintains high display quality without significant time loss.
3Adaptability or versatility
If dual-cache architecture is implemented for data interpolation, then horizontal resolution is expanded, but device complexity increases
Solution Approach 1:
The source driver is segmented into distinct functional modules: a first cache module for initial data storage, an operation conversion module for interpolation, and a second cache module for expanded data storage. This segmentation allows each module to perform its specific function efficiently, enabling horizontal resolution expansion while keeping the overall device complexity manageable through modular design.
Solution Approach 2:
The dual-cache architecture with the operation conversion module creates a universal data processing system that can handle various input resolutions and always output expanded high-resolution data. This multi-functional capability enables horizontal resolution expansion across different display scenarios without requiring separate dedicated hardware for each function, thereby limiting the increase in device complexity.
Data Source
AI summary
A display apparatus, control method, electronic device, and computer-readable storage medium are provided. The display apparatus includes a display substrate and a source driver. The display substrate includes a plurality of data signal lines, and the source driver includes a first cache module, a second cache module, an operation conversion module, and an output module. The first cache module includes M first cache units for caching N initial data at intervals. The second cache module includes M second cache units. The operation conversion module is configured to send P initial data to corresponding P second cache units according to the control signal, calculate (M-P) interpolation data based on Q initial data, and send (M-P) interpolation data to (M-P) second cache units other than P second cache units. The output module is configured to output M data cached by M second cache units to a plurality of data signal lines.


