Source Driver Clock Recovery Using Trans-Impedance Amplifier

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Solution Overview

Problem

In liquid crystal display (LCD) devices, existing interface systems such as RSDS, mini-LVDS, and AiPi face challenges with signal transmission quality due to resistance variations and external frequency interference, leading to errors in signal recovery and transmission, especially in high-resolution, large-area panels and chip-on-glass structures.

Innovation Solution

A source driver incorporating a trans-impedance amplifier and comparator to recover clock and data signals within the data current, minimizing the impact of termination resistance and external frequencies, and using a delay locked loop to generate clock pulses, allowing for signal recovery without separate reference voltages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a termination resistor is used to convert data current into voltage in RSDS or mini-LVDS systems, then signal recovery is enabled, but resistance variation generates electromagnetic waves and transmission errors

Engineering Contradiction:
Improvesignal recovery qualityVSAvoidelectromagnetic waves and transmission errors
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the clock signal from the data current by using a band-pass filter to isolate the clock frequency component, separating it from the data signal. This allows independent clock recovery without relying on termination resistors that cause electromagnetic interference and resistance variations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a band-pass filter as an intermediary component between the data current input and the clock recovery process. This filter acts as a mediator that selectively passes the clock frequency while blocking other frequencies, enabling clean clock extraction without the harmful effects of termination resistors.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If AiPi is used to eliminate skew among signal lines by carrying clock in data signal, then signal transmission quality improves, but resistance variation and IR-drop cause errors in signal recovery

Engineering Contradiction:
Improvesignal transmission qualityVSAvoidsignal recovery accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent extracts the clock signal from the combined data current by using frequency-selective filtering. The band-pass filter isolates the clock frequency component from the data current, allowing accurate clock recovery that is independent of resistance variations and IR-drop effects in the signal lines.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the approach from voltage-based signal recovery to current-based signal processing with frequency-selective extraction. By converting the recovery mechanism to operate in the frequency domain rather than relying on voltage levels, the system becomes immune to resistance variations and IR-drop that plague voltage-based systems.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If chip-on-glass structure is used to reduce area and achieve price competitiveness, then manufacturing cost and area are reduced, but signal line resistance increases making driving difficult

Engineering Contradiction:
Improvemanufacturing cost and areaVSAvoidsignal line drivability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent replaces the traditional voltage-based electrical signal transmission system with a current-based system that uses frequency modulation. This substitution allows the clock signal to be transmitted through the same data lines without requiring separate high-quality signal paths, making the system compatible with high-resistance COG structures.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent makes the data lines serve multiple functions: they carry both data signals and clock signals simultaneously through frequency-division multiplexing. This multi-functionality eliminates the need for separate clock lines, reducing the overall signal line count and making the COG structure more drivable despite higher resistance.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enables reliable signal recovery with minimized errors and IR-drop, facilitating efficient signal transmission and reducing manufacturing costs by eliminating the need for separate signal lines and reference voltages, suitable for high-resolution and chip-on-glass structures.

Implementation Method 1

A termination resistor may be used to convert an input data current into a corresponding data voltage

Methodology Applied
Scientific EffectTrans-impedance conversion: Ohm's Law

Implementation Method 2

A delay locked loop may be used to generate clock pulses

Methodology Applied
Scientific EffectDelay locked loop synchronization:

Data Source

PatentUS8253715B2Source driver and liquid crystal display device having the same
Publication Date: 2012.08.28 DB GLOBALCHIP CO LTD
  • US8253715B2 patent drawing
  • US8253715B2 patent drawing
  • US8253715B2 patent drawing

AI summary

A source driver and a liquid crystal display (LCD) device having the same. A source driver may carry a clock in a data current, and may recover a clock signal and/or a data signal without being substantially affected by external frequencies and/or resistance. A source driver may include a trans-impedance amplifier which may receive data currents, convert data currents into voltages, and/or output voltages as data voltages and/or clock voltages. A source driver may include a comparator electrically coupled to a trans-impedance amplifier, which may change levels of data and/or clock voltages applied from a trans-impedance amplifier, and/or may output level-changed voltages as data signals and/or a clock signal.