Source Driver Power-On Screen Pattern Correction Circuit
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Solution Overview
Problem
Conventional power-on screen pattern correcting methods for displays require a large number of extra NAND gates in the source driver, leading to increased area and cost, as they attempt to achieve a uniform power-on screen pattern.
Innovation Solution
A power-on screen pattern correcting apparatus using a flip-flop, first logic unit, and second logic unit generates control signals to control switch units, allowing output terminals to enter a high-impedance state or couple with a charge sharing line, ensuring uniform start output data and a uniform power-on screen pattern without the need for numerous extra NAND gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If extra NAND gates are added to each latch to correct the power-on screen pattern, then the power-on screen pattern becomes uniform, but the area and cost of the source driver increase significantly
Solution Approach 1:
The invention extracts the power-on screen correction function from the individual latch circuits and relocates it to a dedicated correction circuit (200) that operates on the output data of all latches. This separation allows the latches to remain simple while the correction function is centralized, dramatically reducing the area increase from what would be required if each latch contained extra NAND gates.
Solution Approach 2:
The invention introduces a charge sharing line (32) as an intermediary element that connects all output terminals (01-0n) of the source driver. During the power-on correction phase, this line enables charge redistribution among all output terminals, forcing them to equalize their voltage levels and produce uniform start output data without requiring complex logic in each latch.
2Reliability
If extra NAND gates are added to each latch to correct the power-on screen pattern, then the power-on screen pattern becomes uniform, but the cost of the source driver increases
Solution Approach 1:
By extracting the correction function from individual latches and placing it in a shared correction circuit, the invention reduces the total component count. Instead of having 384×6=2304 extra NAND gates distributed across all latches, the design uses a small number of switch units (SF1-SFn, SS1-SSn), logic units (220, 230), and a charge sharing line that serves all 384 channels simultaneously.
Solution Approach 2:
The charge sharing line (32) and switch units serve multiple functions: they enable power-on correction, control high-impedance states, and manage charge redistribution across all output terminals. This multi-functionality eliminates the need for dedicated correction components in each latch, reducing overall device complexity and manufacturing cost.
3Area of stationary object
If a simple latch circuit is used without extra NAND gates, then the source driver area and cost are reduced, but the power-on screen pattern becomes random
Solution Approach 1:
The invention implements preliminary correction action by introducing a power start signal (P) that triggers the correction circuit (200) to equalize all output terminal voltages before normal display operation begins. The flip-flop (210) and logic units prepare the system in advance, ensuring uniform start output data (S01-S0n) is generated before pixel data transmission starts, thus preventing random patterns without adding area to each latch.
Data Source
AI summary
A power-on screen pattern correcting apparatus is for correcting start output data of output terminals of a source driver such that a power-on screen pattern of a display is substantially uniform. The correcting apparatus comprises a flip-flop, a first logic unit and a second logic unit. The flip-flop controls a level of an inner signal to be substantially equal to a low signal level in response to a low level of a power start signal. The first logic unit enables a first signal in response to the low level of the inner signal or a low level of a high-impedance control signal. The second logic unit enables a second signal such that the output terminals are coupled to a charge sharing line and the power-on screen pattern is uniform in response to the low level of the inner signal or a low level of a charge-sharing control signal.