Source Driver Delay Control Circuit for LCD Panel Charging Uniformity
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Solution Overview
Problem
In large-sized liquid crystal display panels, the transmission delay of gate driving signals due to RC loads on gate lines leads to uneven charging of pixel units, resulting in display abnormalities as pixel units farther from the gate driver are insufficiently charged, exacerbating issues with panel size increases.
Innovation Solution
A source driver apparatus with a delay control circuit that adjusts the delay times of source driving signals to correspond to distances from the source lines to the gate driver, ensuring each pixel unit receives adequate charging time by varying the delay times within a horizontal scanning period.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the panel size is increased, then the display area is improved, but the transmission delay of gate driving signals increases causing pixel units to be insufficiently charged
Solution Approach 1:
The patent applies dynamics by making the pulse width of gate driving signals variable rather than fixed. The timing controller dynamically adjusts the pulse width based on the position of pixel units - pixel units farther from the gate driver receive longer pulse widths to compensate for increased RC delay, ensuring adequate charging time across the entire display panel regardless of size
Solution Approach 2:
The patent implements local quality by applying different pulse width settings to different spatial locations on the panel. Instead of using a uniform pulse width for all pixel units, the system tailors the charging parameters locally - pixel units at greater distances from the gate driver receive extended charging duration, while those closer receive standard charging time
2Reliability
If the pulse width of gate driving signals is increased to compensate for delay, then the charging time of distant pixel units is improved, but the overall scanning speed decreases
Solution Approach 1:
The patent resolves this contradiction by applying local quality - different pulse widths are assigned to different spatial locations. Only pixel units that require extended charging (those farther from the gate driver) receive longer pulse widths, while pixel units closer to the gate driver maintain standard pulse widths, thus preserving overall scanning speed
3Loss of time
If the RC load on gate lines is reduced, then the transmission delay is decreased, but the circuit complexity increases
Solution Approach 1:
The patent applies parameter changes by modifying the temporal parameters (pulse width duration) of the gate driving signals rather than altering the physical electrical parameters (resistance or capacitance) of the gate lines. This software/timing-based approach compensates for RC delay without requiring hardware modifications that would increase circuit complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution increases the effective charging times of pixel units, preventing display abnormalities by ensuring all pixel units are sufficiently charged, even in larger panels, by dynamically adjusting the delay times of source driving signals based on their distance from the gate driver.
Implementation Method 1
the transmission delay of gate driving signals due to RC loads on gate lines leads to uneven charging of pixel units
Implementation Method 2
pixel units are insufficiently charged, resulting in display abnormalities
Data Source
AI summary
A source driver apparatus and an operating method thereof are provided. The source driver apparatus can drive a plurality of source lines of a display panel, wherein the display panel further comprising a gate driver apparatus. The source driver apparatus includes driving channels and a delay control circuit. The driving channels output source driving signals. The delay control circuit controls the driving channels to change delay times of the source driving signals within the same period, such that the delay times of the source driving signals respectively correspond to distances from the source lines to the gate driver apparatus.


