Source Driver Current Fold-Back Protection Circuit

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Solution Overview

Problem

Existing high side drivers require oversized output transistors due to progressive current limitation methods, leading to larger packaging and potential damage during overload conditions.

Innovation Solution

A source driver with an improved current foldback transfer function that reduces output stage current upon fault detection, limiting it to a safe level to avoid damage and allowing automatic restart when the fault clears, using a current protection logic circuit to manage load current.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If progressive current limitation is used to protect against overload, then load and driver are protected from damage, but output transistors must be oversized to handle power dissipation during faults

Engineering Contradiction:
Improveprotection against overload damageVSAvoidoutput transistor size
Core Design Contradiction:
ReliabilityVSWeight of stationary object

Solution Approach 1:

The patent implements dynamic current limiting where the current limit is not fixed but varies based on operating conditions. During fault conditions, the current limit dynamically adjusts to provide adequate protection while allowing normal operation at full current capacity, eliminating the need for oversized transistors designed for worst-case static conditions

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of current limit based on operating conditions. By monitoring voltage and current parameters and adjusting the current limit accordingly, the system provides protection when needed while maintaining efficient operation during normal conditions, avoiding the need for continuously oversized components

Inventive Principle:
Principle #35Parameter changes

2Weight of stationary object

If current foldback is implemented to reduce power dissipation during faults, then transistor sizing is reduced, but driver must remain inactive for a predetermined interval after fault clears

Engineering Contradiction:
Improveoutput transistor sizeVSAvoidrestart delay after fault
Core Design Contradiction:
Weight of stationary objectVSLoss of time

Solution Approach 1:

The patent implements preliminary action by providing a predetermined interval after fault clearance before restarting the driver. This prevents immediate restart that could expose the driver to recurring faults or damage, while the interval is optimized to be as short as safely possible. The system prepares for restart in advance with controlled timing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses feedback mechanisms to monitor fault conditions and control the restart timing. By continuously monitoring operating parameters and providing feedback to the control logic, the system determines when it is safe to restart the driver, balancing protection needs with minimal interruption of operation

Inventive Principle:
Principle #23Feedback

3Reliability

If safe operation area is expanded to handle fault conditions, then driver protection is improved, but device packaging size increases

Engineering Contradiction:
Improvesafe operation areaVSAvoiddevice packaging
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent makes the safe operation area dynamic rather than static. Instead of designing transistors for the worst-case static fault condition, the system dynamically controls operating parameters to keep the transistor operation within safe boundaries during both normal and fault conditions, enabling compact packaging

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent converts the harmful fault condition into a controlled operational state. By detecting faults and adjusting operating parameters, the system transforms potentially damaging high-power fault conditions into safe operating modes that protect the transistor while maintaining compact size

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS8482894B2Source driver current fold-back protection
Publication Date: 2013.07.09 LANTERIS SPACE LLC
  • US8482894B2 patent drawing
  • US8482894B2 patent drawing
  • US8482894B2 patent drawing

AI summary

A load current is limited to a safe level with a current protection logic circuit within a first selected interval after detection of a fault condition. The current protection logic circuit returns the load current to a normal level within a second selected interval after correction of the fault condition, wherein said safe level is less than one half of the normal level. The current protection logic circuit is a feature of a high side driver comprising at least two source drivers, each source driver being configured to switch an electrical load to a common power supply, and comprising a respective current protection logic circuit.