Source Driver Gray-Level Interpolation for Gamma Voltage Nonlinearity

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Solution Overview

Problem

Conventional display technology faces challenges in optimizing power consumption and layout area due to non-linear gamma voltage relationships and fixed bit interpolation across the entire gray level range, necessitating voltage adjustments that are inefficient.

Innovation Solution

A source driver with multiple interpolation amplifiers that dynamically adjust the number of bits based on gray levels, dividing the gray level range into groups and performing different interpolation operations for each group to optimize voltage adjustments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If fixed bit interpolation is used across the entire gray level range, then the circuit structure is simple, but the display performance is poor due to non-linearity in gamma voltages

Engineering Contradiction:
Improvedisplay performanceVSAvoidcircuit structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The gray level range is divided into multiple segments (first group and second group), with each segment using a different bit interpolation method. This segmentation allows the system to apply fixed bit interpolation where it works well and variable bit interpolation where it is needed, resolving the contradiction between simplicity and performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interpolation bit depth is made dynamic rather than fixed, allowing it to change based on the gray level range. The circuit can switch between different bit interpolation modes (j-bit for first group, k-bit for second group) depending on the input signal characteristics, improving display performance without requiring a completely complex circuit redesign.

Inventive Principle:
Principle #15Dynamics

2Manufacturing precision

If voltage adjustments are made to compensate for non-linearity, then display performance improves, but power consumption increases

Engineering Contradiction:
Improvedisplay performanceVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

Instead of applying full variable bit interpolation across all gray levels (which would maximize performance but also power consumption), the invention applies it only partially - specifically for the second group of gray levels where it is most needed. This partial application achieves acceptable display performance while limiting the increase in power consumption.

Inventive Principle:
Principle #16Partial or excessive action

3Manufacturing precision

If voltage adjustments are made to compensate for non-linearity, then display performance improves, but layout area increases

Engineering Contradiction:
Improvedisplay performanceVSAvoidlayout area
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The gray level range is divided into multiple segments (first group and second group), with each segment using a different bit interpolation method. This segmentation allows the system to apply fixed bit interpolation where it works well and variable bit interpolation where it is needed, resolving the contradiction between simplicity and performance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of applying full variable bit interpolation across all gray levels (which would maximize performance but also power consumption), the invention applies it only partially - specifically for the second group of gray levels where it is most needed. This partial application achieves acceptable display performance while limiting the increase in power consumption.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250384810A1Source driver and display apparatus comprising the same
Publication Date: 2025.12.18 ANAPASS
  • US20250384810A1 patent drawing
  • US20250384810A1 patent drawing
  • US20250384810A1 patent drawing

AI summary

The present disclosure provides a source driver comprising a plurality of interpolation amplifiers, wherein each interpolation amplifier includes: an input selection unit that receives an upper limit voltage, a lower limit voltage, and pixel data corresponding to a gray level, and outputs logic values according to the gray level; an input stage that receives the logic values and outputs a corresponding current; a load stage that converts the current to an analog voltage and outputs it; and an output stage that outputs the analog voltage, wherein the plurality of interpolation amplifiers are divided into a first group to which first group gray levels are input and a second group to which second group gray levels are input, wherein the interpolation amplifiers included in the first group perform j-bit interpolation on the upper limit voltage and the lower limit voltage to output an interpolated voltage, and the interpolation amplifiers included in the second group perform k-bit interpolation on the upper limit voltage and the lower limit voltage to output an interpolated voltage (j, k: both natural numbers, k>j).