Source Driver Circuit Segmentation for Display Writing Periods

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Solution Overview

Problem

Display devices face challenges in achieving double-frame rate driving while reducing the number of external IC chips, particularly in ensuring sufficient time for writing image data to source lines, which is crucial for high-quality displays and 3D applications.

Innovation Solution

The implementation of a display device structure that includes a first functional circuit for dividing input signals into multiple image data, a second functional circuit for transferring data between memory elements, and a third functional circuit for outputting data to source lines, all formed over the same substrate, utilizing oxide semiconductor transistors for improved performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the number of source driver IC chips is reduced by providing an analog switch array, then the number of external IC chips is reduced, but the period to write image data to source lines becomes insufficient

Engineering Contradiction:
Improvenumber of external IC chipsVSAvoidwriting period to source lines
Core Design Contradiction:
Device complexityVSDuration of action of moving object

Solution Approach 1:

The source driver circuit is segmented into multiple independent source driver IC chips, where each chip drives a specific group of source lines. This segmentation allows parallel operation of multiple chips, thereby extending the total writing period while reducing the load on individual chips and maintaining manageable device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Image data is stored in advance in memory elements (such as capacitors or register circuits) within the source driver circuit before being written to the source lines. This preliminary storage allows the data to be ready for immediate transfer when the writing period begins, ensuring sufficient writing time without requiring excessively long data preparation periods.

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If multiple image data are output from one terminal of source driver IC chip, then the number of pins is reduced, but the writing period for each color data becomes uneven and insufficient

Engineering Contradiction:
Improvenumber of pinsVSAvoidwriting period for each color data
Core Design Contradiction:
Quantity of substanceVSDuration of action of moving object

Solution Approach 1:

The output terminals are segmented such that each terminal is dedicated to outputting a specific color data (R, G, or B). This one-to-one correspondence between terminals and color channels ensures that each color data has its own dedicated writing period, making the writing periods uniform and sufficient without requiring multiplexing that would create timing conflicts.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each source driver IC chip is designed with multi-functionality to handle multiple operations: storing image data in memory elements, controlling switching elements to select which color data to output, and writing data to the appropriate source lines. This multi-functionality allows the circuit to efficiently manage multiple color channels through a coordinated sequence of operations within each writing period.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9368053B2Display device
Publication Date: 2016.06.14 SEMICON ENERGY LAB CO LTD
  • US9368053B2 patent drawing
  • US9368053B2 patent drawing
  • US9368053B2 patent drawing

AI summary

Provided is to secure a data-writing period to a source line and reduce the number of the IC chips used. N image data (e.g., three image data, RGB) are sequentially input to one input terminal. Three switches, three first memory elements, three transfer switches, three second memory elements, and three buffers are connected in parallel to the input terminal. The three switches are turned on respectively. RGB image data are held in the three respective first memory elements. In a selection period of a gate line of an (m−1)-th row, image data of an m-th row are written to the first memory elements. When the three transfer switches are turned on in a selection period of a gate line of an m-th row, the image data are transferred to and held in the second memory elements. Then, the image data are output to each source line through each buffer.