Source-Connected Field Plates for Low-Capacitance GaN Transistors
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Solution Overview
Problem
There is a need for semiconductor devices, particularly gallium nitride (GaN) devices, with field plates to reduce gate-drain feedback capacitance and increase breakdown voltage in high-frequency transistors, while minimizing additional capacitance between the gate and source.
Innovation Solution
A method of fabricating semiconductor devices with a channel region, a control electrode, and a field plate electrode, where the field plate dielectric is separated from the substrate by a dielectric material, and the field plate electrode is capacitively coupled to the channel region, using multiple dielectric layers to manage capacitance and mitigate additional capacitance between the gate and source.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If field plates are added to increase breakdown voltage, then device breakdown voltage is increased, but device complexity increases
Solution Approach 1:
The field plate electrode is designed to serve multiple functions simultaneously: it reduces gate-to-drain feedback capacitance, increases breakdown voltage, and when combined with the dielectric material, prevents additional gate-to-source capacitance formation. By making the field plate multi-functional, the need for separate structures is eliminated, thereby reducing overall device complexity while achieving multiple performance improvements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces gate-to-drain feedback capacitance while minimizing additional gate-to-source capacitance, enhancing the performance characteristics of high-frequency transistors by controlling the positioning and dielectric constants of the field plate and control electrode.
Implementation Method 1
A first end of the field plate electrode is capacitively coupled to the channel region across the field plate dielectric within the second aperture in top surface dielectric
Implementation Method 2
depositing a field plate dielectric that directly contacts the top surface above the channel region in the second aperture; and forming a field plate electrode in the second aperture that is separated from the top surface of the substrate by the field plate dielectric
Data Source
AI summary
Placement of a field plate in a field-effect transistor is optimized by using multiple dielectric layers such that a first end of field plate is separated from a channel region of the transistor by a first set of one or more distinct dielectric material layers. A second end of the field plate overlies the channel region and a control electrode from which it is separated by the first set of dielectric layers and one or more additional dielectric layers.