Differential Source Follower With Cross-Coupled Auxiliary Transistors
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Solution Overview
Problem
Differential source follower circuitry suffers from gain loss and linearity degradation due to channel length modulation (CLM) effects and limited output impedance, leading to harmonic distortion in the output signal.
Innovation Solution
The implementation of a differential amplifier circuitry with cross-coupled auxiliary transistors of opposite conductivity type, which increases gain and improves linearity without additional power consumption, by controlling the gate terminals of main and auxiliary transistors with component input signals and regulating currents through current sources to maintain constant DC components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If source follower circuitry is used as a voltage buffer, then high input impedance is achieved, but gain loss occurs due to channel length modulation effects
Solution Approach 1:
The patent introduces auxiliary transistors as intermediary elements that mediate between the input and output of the source follower circuit. These auxiliary transistors provide additional current paths that compensate for the gain loss caused by channel length modulation, while the main source follower structure maintains its high input impedance characteristic.
Solution Approach 2:
The patent modifies the circuit parameters by adding auxiliary transistors with specific conductivity types and configuring their gate terminals to be controlled by input signals. This changes the overall transfer function of the circuit, compensating for the gain reduction without altering the high input impedance property of the original source follower.
2Stability of the object's composition
If source follower circuitry is used, then high input impedance is maintained, but linearity is degraded due to channel length modulation effects
Solution Approach 1:
The auxiliary transistors act as intermediary devices that linearize the overall transfer characteristic. By controlling these auxiliary transistors with input signals, the circuit compensates for the non-linear effects of channel length modulation, improving linearity while preserving the high input impedance of the source follower configuration.
Solution Approach 2:
The patent implements a feedback mechanism where the auxiliary transistors sense the input signal and adjust their conduction to compensate for the non-linear behavior of the main transistors. This feedback action improves linearity by counteracting the channel length modulation effects that would otherwise degrade the transfer characteristic.
3Power
If auxiliary transistors are added to increase gain, then power consumption increases, but the patent claims no additional power consumption
Solution Approach 1:
The patent merges the function of the auxiliary transistors with the existing biasing network of the source follower. The auxiliary transistors share the same bias current paths and voltage supplies as the main transistors, so their operation is powered by the existing circuit resources without requiring additional power consumption.
Solution Approach 2:
The auxiliary transistors perform multiple functions: they provide gain enhancement, improve linearity, and maintain the differential operation of the circuit. By making the auxiliary transistors multi-functional, the patent achieves multiple performance improvements without proportionally increasing power consumption, as the same biasing infrastructure serves both main and auxiliary transistors.
Data Source
AI summary
Differential amplifier circuitry including: first and second main transistors of a given conductivity type: and first and second auxiliary transistors of an opposite conductivity type, where the first and second main transistors are connected along first and second main current paths passing between first and second main voltage reference nodes and first and second output nodes, respectively, with their source terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by component input signals of a differential input signal; and the first and second auxiliary transistors are connected along first and second auxiliary current paths passing between first and second auxiliary voltage reference nodes and the first and second output nodes, respectively, with their drain terminals connected to the first and second output nodes, respectively, and with their gate terminals controlled by the component input signals of the differential input signal.