Source-Follower Comparator for Linear ADC Input Loading

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Solution Overview

Problem

Comparators in high-speed pipeline ADCs often present non-linear loads, leading to errors in signal processing due to varying current and voltage drops, which are difficult to correct, especially at higher frequencies.

Innovation Solution

A comparator architecture using a transistor in source follower configuration with a capacitor and latch, where the capacitor is charged with one input signal and compared to another without discharge, ensuring the transistor operates in the saturation region for all input signal strengths, presenting a linear load and eliminating non-linear errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional comparator is used in high-speed pipeline ADCs, then the comparison function is achieved, but non-linear loads cause errors in signal processing

Engineering Contradiction:
Improvecomparison accuracyVSAvoidsignal processing accuracy
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent changes the operating parameters of the comparator by configuring the transistor in source follower mode and operating it in the saturation region. This parameter change transforms the non-linear load characteristic into a linear load characteristic, eliminating the source of comparison errors while maintaining accurate comparison function

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic control through the capacitor charging/discharging mechanism controlled by clock signals. The capacitor is charged during the first clock phase and discharged during the second clock phase, enabling the comparator to dynamically adapt to high-speed operation while maintaining linear load characteristics throughout the signal strength range

Inventive Principle:
Principle #15Dynamics

2Device complexity

If the transistor operates in non-saturation region, then the circuit complexity is reduced, but non-linear loads are presented causing errors

Engineering Contradiction:
Improvecircuit operation complexityVSAvoidsignal comparison accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies preliminary action by pre-biasing the transistor in the saturation region through the source follower configuration and capacitor charging mechanism. This preliminary setup ensures the transistor remains in the saturation region throughout operation, establishing linear load characteristics before the comparison operation begins and maintaining accuracy without additional complex control circuits

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration substantially eliminates errors caused by non-linear loads, providing accurate comparison results and reducing dynamic errors associated with varying input signal strengths, thereby improving the reliability of digital codes generated in pipeline ADCs.

Implementation Method 1

a capacitor and a latch, wherein a terminal of the capacitor is connected to a control terminal of the source follower, and the capacitor is charged with one of the input signals and the other input signal is applied to the capacitor without providing a discharge path

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7479915B1Comparator architecture
Publication Date: 2009.01.20 TEXAS INSTRUMENTS INC
  • US7479915B1 patent drawing
  • US7479915B1 patent drawing
  • US7479915B1 patent drawing

AI summary

A comparator presents a linear load to input signals when providing a comparison output of two input signals. The comparator contains a transistor configured in a source/emitter follower configuration, and operates in the saturation region for substantially the entire range of strengths of the input signals. As a result, the comparator presents a substantially constant load to the input signals. When incorporated in circuits such as a pipeline ADC, the comparator may substantially eliminate errors due to non-linear loads.