Source Follower Regulator Circuit for Fast Startup Stability
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Solution Overview
Problem
Existing power regulator circuits face challenges in achieving fast transient response and stable output voltage during startup and load changes, particularly when using common source input stages that require additional time for bias currents to stabilize.
Innovation Solution
The use of source follower input stages coupled with a common gate differential gain stage allows for fast startup and reduced overshoot by leveraging the reference voltage during startup, enabling simultaneous regulation and fast transient response without the need for additional time to charge node capacitances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a common source configuration is used in power regulator circuits, then the circuit structure is simple, but the startup time is slow and transient overshoot occurs
Solution Approach 1:
The patent inverts the traditional common source configuration by using a common gate configuration instead. This inversion allows the regulator to startup simultaneously with the reference voltage without requiring bias currents to charge node capacitances first, thereby achieving fast startup time while maintaining circuit simplicity
Solution Approach 2:
The patent changes the operating parameters of the input stage by using source follower configurations that can operate at low voltages. This parameter change enables the circuit to function effectively during startup when voltages are still ramping up, eliminating the delay associated with waiting for bias currents to establish proper operating points
2Device complexity
If a common source configuration is used in power regulator circuits, then the circuit structure is simple, but transient overshoot occurs during load changes
Solution Approach 1:
By inverting from common source to common gate configuration, the patent eliminates the phase inversion that causes overshoot in traditional designs. The common gate configuration provides non-inverting gain, allowing the feedback loop to respond more accurately to load changes without introducing the oscillatory behavior that leads to transient overshoot
Solution Approach 2:
The patent enhances the feedback mechanism by using source follower input stages that provide better voltage tracking. The feedback loop continuously monitors the output voltage and adjusts the control signal to the power device, ensuring rapid correction of any deviations caused by load changes, thereby maintaining output voltage stability
3Reliability
If additional time is allocated for bias currents to charge node capacitances, then output voltage stabilization is achieved, but startup time increases
Solution Approach 1:
The patent performs preliminary action by designing the common gate configuration to be inherently capable of operating at startup voltages. The source follower input stages are biased to conduct at low voltages, so the circuit is already in its operational state before the reference voltage fully ramps up, eliminating the need to wait for capacitance charging
Solution Approach 2:
The patent changes the voltage threshold parameters of the input stage transistors through the common gate configuration, allowing them to turn on and conduct at much lower voltages than traditional common source configurations. This parameter change enables the circuit to become operational immediately upon power application, achieving both fast startup and reliable voltage stabilization
Data Source
AI summary
An example circuit includes a first source follower input stage having a reference voltage input and a first output. A second source follower input stage has a feedback voltage input and a second output, in which second source follower input stage is configured to receive a feedback voltage at the feedback voltage input. The feedback voltage is representative of an output voltage at an output terminal of the circuit. A common gate differential gain stage has first and second differential inputs and first and second drive outputs. The first differential input is coupled to the first output, and the second differential input is coupled to the second output. The common gate differential gain stage is configured to control the output voltage at the output terminal by controlling at least one of the first or second drive outputs.