Support Source Layer Thickness Split for 3D Memory Reliability
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Solution Overview
Problem
The increasing integration of semiconductor devices leads to a reduction in electrical properties and production yield, making it challenging to meet the requirements of high operating speed and low power consumption while maintaining reliability.
Innovation Solution
A semiconductor device design featuring a source structure with a support source layer, gate stack structure, memory channel structure, and separation structure, where the support source layer includes different thicknesses for various source parts to improve process margins and electrical properties, and an electronic system incorporating this device with a controller for enhanced performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If integration of semiconductor devices is increased, then productivity and compactness are improved, but electrical properties and production yield deteriorate
Solution Approach 1:
The source structure implements local quality by having different thicknesses for different source parts. The first source part has a first thickness and the second source part has a second thickness greater than the first thickness. This allows each source part to be optimized for its specific function: the thinner first source part for memory cell operation and the thicker second source part for peripheral circuit operation, thereby maintaining electrical properties while enabling higher integration
Solution Approach 2:
The source structure is segmented into multiple source parts with different thicknesses. The support source layer is divided into a first source part and a second source part, each serving different functional requirements. This segmentation allows the device to achieve high integration while maintaining reliable electrical properties by optimizing each segment for its specific purpose
2Productivity
If integration of semiconductor devices is increased, then productivity and compactness are improved, but production yield deteriorates
Solution Approach 1:
The invention applies parameter changes by varying the thickness parameter of different source parts. The first source part has a first thickness and the second source part has a second thickness greater than the first thickness. This parameter variation optimizes the device for both high integration and manufacturing yield by allowing different regions to be tuned for their specific requirements
3Speed
If operating speed is increased, then performance is improved, but power consumption increases
Solution Approach 1:
The source structure implements local quality with different thicknesses for different source parts, enabling optimized electrical properties that support high operating speed while maintaining low power consumption. The thinner first source part reduces resistance for memory cell operations, while the thicker second source part provides stable voltage for peripheral circuits, achieving high performance without excessive power consumption
Data Source
AI summary
Disclosed are semiconductor devices, electronic systems including the same, and methods of fabricating the same. The semiconductor device comprises a source structure that includes a support source layer, a gate stack structure on the support source layer, a memory channel structure that penetrates through the gate stack structure and the support source layer, and a separation structure that penetrates through the gate stack structure and the support source layer. The support source layer includes a first source part through which the memory channel structure penetrates, and a second source part through which the separation structure penetrates. A top surface of the first source part is at a level lower than that of a top surface of the second source part.