Source Select Transistor Programming for Memory Devices

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Solution Overview

Problem

Current semiconductor memory devices face challenges in achieving uniform threshold voltage distributions for select transistors, which affects the reliability and efficiency of programming and erasing operations.

Innovation Solution

The method involves programming first source select transistors using a fixed program voltage and second source select transistors using an incremental step pulse program (ISPP) method, ensuring precise control over threshold voltages and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single programming method is used for all source select transistors, then the programming process is simple, but the threshold voltage distribution is non-uniform

Engineering Contradiction:
Improveprogramming process complexityVSAvoidthreshold voltage distribution uniformity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The source select transistors are divided into two groups: first source select transistors programmed using a fixed program voltage method, and second source select transistors programmed using an incremental step pulse program (ISPP) method. This segmentation allows different programming approaches to be applied to different transistor groups, achieving uniform threshold voltage distribution across all transistors while maintaining process simplicity.

Inventive Principle:
Principle #1Segmentation

2Manufacturing precision

If different programming methods are used for different source select transistors, then the threshold voltage distribution is uniform, but the programming process becomes complex

Engineering Contradiction:
Improvethreshold voltage distribution uniformityVSAvoidprogramming process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent combines two programming methods (fixed program voltage and ISPP) into a single programming process that handles multiple source select transistor groups. The control logic integrates both methods seamlessly, applying the appropriate method to each transistor group without requiring separate programming operations, thus achieving uniform threshold voltage distribution while avoiding excessive process complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If fixed program voltage is used for programming, then the programming operation is fast, but the threshold voltage control precision is insufficient

Engineering Contradiction:
Improveprogramming operation speedVSAvoidthreshold voltage control precision
Core Design Contradiction:
ProductivityVSMeasurement precision

Solution Approach 1:

Different programming methods are applied to different groups of source select transistors based on their specific requirements. The fixed program voltage method is applied to first source select transistors where high-speed programming is sufficient, while the ISPP method is applied to second source select transistors where precise threshold voltage control is critical. This local differentiation optimizes both speed and precision where needed.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10636492B2Memory device having plurality of memory cell strings, plurality of source select transistors and plurality of drain select transistors and method of operating a memory device having improved threshold voltage distributions of select transistors
Publication Date: 2020.04.28 SK HYNIX INC
  • US10636492B2 patent drawing
  • US10636492B2 patent drawing
  • US10636492B2 patent drawing

AI summary

A method of operating a memory device having improved threshold voltage distributions of select transistors, the memory device including a plurality of cell strings each including a plurality of source select transistors, a plurality of memory cells, and a plurality of drain select transistors stacked in a vertical direction to a substrate include performing a first program operation to program at least one source select transistor coupled to a first source select line adjacent to a common source line, among the plurality of source select transistors, using a fixed program voltage, and performing a second program operation to program at least one source select transistor coupled to a second source select line adjacent to the first source select line, among the plurality of source select transistors, using an incremental step pulse program (ISPP) method after the first program operation is completed.