Source-Side Injection Programming With Capacitive Bit Line Boosting
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Solution Overview
Problem
In flash memory systems, programming one cell on a word line often inadvertently programs adjacent unselected cells due to the application of program voltage to all cells connected to the same word line, leading to 'program disturb' issues, which existing techniques like self-booster methods partially address but not fully.
Innovation Solution
The implementation of source-side injection programming (SSI) with a self-adjusting bit line voltage, where a first voltage is applied to a selected bit line, and a second voltage boosts adjacent bit lines through capacitive coupling, allowing for controlled electron injection from the source side into the selected memory cell without directly applying high voltages to column control circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If program voltage is applied to all cells connected to the same word line, then programming of selected cells is achieved, but adjacent unselected cells are inadvertently programmed causing program disturb
Solution Approach 1:
The patent applies different voltage levels to different bit lines: a first voltage level to selected bit lines to enable programming, and a second voltage level to unselected bit lines to prevent program disturb. This local differentiation of voltage conditions allows selective programming without affecting adjacent cells.
Solution Approach 2:
The patent segments the bit line voltage control into distinct groups: selected bit lines receive one voltage level while unselected bit lines receive another voltage level. This segmentation enables independent control of programming conditions for different cell groups connected to the same word line.
2Productivity
If high voltage is directly applied to column control circuitry for source-side injection programming, then electron injection efficiency is improved, but circuitry complexity and voltage handling requirements increase
Solution Approach 1:
The patent introduces a voltage boosting mechanism that acts as an intermediary between the low-voltage column control circuitry and the high-voltage requirement for electron injection. The circuitry generates high voltage locally at the bit line without requiring the entire column control system to handle high voltages directly.
Solution Approach 2:
The patent changes the voltage parameter dynamically: low voltage is applied to column control circuitry for safety and simplicity, while high voltage is generated locally at the bit line through boosting mechanisms when needed for efficient electron injection. This parameter transformation resolves the contradiction between injection efficiency and circuitry complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces program disturb by controlling the programming rate and voltage distribution, enabling efficient programming of selected cells while preventing unintended programming of unselected cells, and allows for the use of low operating voltage circuitry.
Implementation Method 1
Because of capacitive coupling between the adjacent bit lines and the selected bit line, the selected bit line is boosted above the first voltage level by application of the second low voltage to the unselected bit lines
Data Source
AI summary
Non-volatile memory is programmed using source side hot electron injection. To generate a high voltage bit line for programming, the bit line corresponding to a selected memory cell is charged to a first level using a first low voltage. A second low voltage is applied to unselected bit lines adjacent to the selected bit line after charging. Because of capacitive coupling between the adjacent bit lines and the selected bit line, the selected bit line is boosted above the first voltage level by application of the second low voltage to the unselected bit lines. The column control circuitry for such a memory array does not directly apply the high voltage and thus, can be designed to withstand lower operating voltages, permitting low operating voltage circuitry to be used.