Source-Tuned Analog Circuit for Distributed Amplifier Gain Slope

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Solution Overview

Problem

Conventional distributed amplifiers experience a decline in frequency characteristics due to increasing input capacitance, leading to a gain slope that deteriorates output waveforms in optical communication systems, and the Capacitive Source Degeneration circuit, while reducing input capacitance, introduces variations that can decrease yield.

Innovation Solution

The implementation of an input transistor and an input capacitance change circuit that adjusts input capacitance through variable resistor and capacitor circuits, allowing for compensation of variations in transistor characteristics, thereby maintaining the expression C_s R_s = C_in / g_m and reducing the gain slope while preserving yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the input capacitance C_in is increased to accommodate transistor variations, then the amplifier can handle broader frequency ranges, but the loss of the pseudo transmission line increases and frequency characteristics deteriorate

Engineering Contradiction:
Improvefrequency rangeVSAvoidtransmission line loss
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent changes the parameter of input capacitance from a fixed value to a variable value that can be dynamically adjusted. By controlling the input capacitance C_in to be variable, the system can optimize the trade-off between handling transistor variations and maintaining acceptable transmission line loss across different operating conditions.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the Capacitive Source Degeneration circuit is used to reduce input capacitance, then the attenuation constant is reduced and gain slope is suppressed, but variations in transistor characteristics cause yield to decrease

Engineering Contradiction:
Improvefrequency characteristic stabilityVSAvoidmanufacturing yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent makes the input capacitance dynamic rather than static. By providing a mechanism to variable control C_in, the system can adapt to transistor characteristic variations without requiring precise manufacturing tolerances, thus maintaining both frequency characteristic stability and manufacturing yield.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements a feedback mechanism where the input capacitance is controlled based on the actual transistor characteristics. This feedback allows the system to compensate for manufacturing variations by adjusting C_in to maintain the optimal relationship C_s R_s = C_in / g_m, thereby preserving both performance and yield.

Inventive Principle:
Principle #23Feedback

3Ease of manufacture

If fixed resistor and capacitor values are used in the Capacitive Source Degeneration circuit, then the circuit is simple to manufacture, but the gain slope cannot be effectively suppressed across varying transistor characteristics

Engineering Contradiction:
Improvecircuit fabrication simplicityVSAvoidgain slope suppression
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces variable control elements that allow the resistor and capacitor values to be adjusted after manufacturing. This dynamic capability enables effective gain slope suppression across varying transistor characteristics while maintaining relatively simple manufacturing processes, as the variability is achieved through control mechanisms rather than complex component designs.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP2166667B1Analog circuit
Publication Date: 2012.02.01 FUJITSU LTD
  • EP2166667B1 patent drawingFigure 1
  • EP2166667B1 patent drawingFigure 2
  • EP2166667B1 patent drawingFigure 3A~3B

AI summary

An analog circuit is provided, comprising an input transistor and an input capacitance change circuit changing input capacitance of said input transistor. The input capacitance change circuit comprises at least one of a variable resistor circuit connected to a source of said input transistor and a variable capacitor circuit connected to the source off said input transistor.