Source Via Barrier Layout for Low Resistance and Leakage Isolation
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Solution Overview
Problem
As semiconductor fabrication progresses to ever smaller technology nodes, contact resistances degrade device performance due to limited contact surface areas, especially on the drain side, and via structures with barrier layers increase contact resistance while barrier-free vias lead to via-to-via leakage.
Innovation Solution
Designing source side vias with a partially barrier-free bottom surface and a barrier layer on the sidewalls to enhance contact area and prevent via-to-via leakage, while maintaining reduced contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If barrier layers are added to via structures to prevent leakage, then via-to-via leakage is prevented, but contact resistance increases
Solution Approach 1:
The via structure employs different barrier layer configurations at different locations: the first via has a barrier layer on its bottom surface to prevent leakage, while the second via has no barrier layer on its bottom surface to maintain low contact resistance. This spatial differentiation of barrier layer presence allows simultaneous achievement of leakage prevention and low contact resistance in different via structures within the same device.
2Object-affected harmful factors
If contact surface area is increased to reduce contact resistance, then contact resistance decreases, but device area increases
Solution Approach 1:
The invention applies different via design strategies to different via structures based on their functional requirements. The first via (connected to drain contact) uses a barrier layer to prevent leakage despite limited area, while the second via (connected to source contact) uses a barrier-free design to maximize contact area and minimize contact resistance. This localized optimization allows the device to achieve low contact resistance without proportionally increasing overall device area.
Data Source
AI summary
A semiconductor device includes a source via having a body portion and a barrier layer surrounding the body portion, and the body portion is in physical contact with the source contact. Furthermore, the barrier layer includes at least one sidewall section separating the source via from an adjacent via structure. As such, the via to via leakage may be prevented. Overall, by providing a semiconductor device having the above structures, the contact resistance is reduced, and the device performance is further improved.