Source Organized Source View Data Structure for Instruction Dependency Tracking

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Solution Overview

Problem

Current processor architectures face inefficiencies in handling multiple tasks due to the overhead of context switching and the complexity of managing large numbers of threads, particularly in fine-grain parallelism, where hardware thread-aware architectures do not adequately support non-threaded software code and result in significant software overhead for initiating and synchronizing threads.

Innovation Solution

The method involves grouping instructions into blocks and using a source-organized source view data structure to track instruction dependencies through register templates, allowing for efficient dependency broadcasting and reduced overhead by managing instructions at a block level rather than individually, thereby simplifying out-of-order execution and reducing the need for frequent context switches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If hardware duplicates all architecture state elements for each supported thread, then context switch is eliminated for hardware-supported threads, but area, power and complexity increase significantly

Engineering Contradiction:
Improvecontext switch timeVSAvoidhardware complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The architecture state is segmented into multiple contexts (context0, context1, etc.), each representing a different thread's state. Instead of duplicating all state elements for each thread, the system maintains separate context structures that can be selectively activated. This segmentation allows the processor to switch between contexts without duplicating the entire architecture state for each thread, reducing hardware complexity while maintaining context switch efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The context register file and associated hardware structures are designed to be universal, serving multiple threads through time-multiplexed access. The same physical hardware resources (register files, rename buffers, etc.) are shared across different contexts, with context identifiers directing access to the appropriate thread's state. This multi-functionality eliminates the need for dedicated duplicate hardware for each thread, reducing area and complexity while maintaining fast context switching.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Loss of time

If hardware supports multiple context states for limited threads, then context switch is eliminated for those threads, but the solution does not help non-threaded software code and requires context switch when software threads exceed hardware threads

Engineering Contradiction:
Improvecontext switch timeVSAvoidthread support flexibility
Core Design Contradiction:
Loss of timeVSAdaptability or versatility

Solution Approach 1:

The context switching mechanism is designed to be dynamic and adaptive. The system can operate in different modes: when hardware-supported threads are active, context switching is eliminated through direct context activation; when non-threaded code or software threads exceed hardware limits, the system dynamically performs context switches. This dynamic behavior allows the architecture to adapt to different workloads and thread configurations, providing both fast context switching when needed and eliminating it when possible.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters based on workload characteristics. When the number of active threads exceeds hardware capabilities, the context switch interval parameter decreases (more frequent switches). When fewer threads are active, the system can increase the context switch interval or eliminate switching entirely for hardware-supported threads. This parameter adaptation allows flexibility in handling both threaded and non-threaded code efficiently.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If instructions are processed individually, then dependency tracking is precise, but overhead increases and parallelism efficiency decreases

Engineering Contradiction:
Improvedependency tracking precisionVSAvoidinstruction processing throughput
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

Multiple individual instructions are merged into instruction blocks that are processed together as a unit. The dependency tracking mechanism operates at the block level rather than individual instruction level, recording dependencies between blocks instead of between every individual instruction. This merging reduces the overhead of dependency tracking while maintaining precision at the block level, enabling more instructions to be processed in parallel through out-of-order execution of instruction blocks.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10275255B2Method for dependency broadcasting through a source organized source view data structure
Publication Date: 2019.04.30 INTEL CORP
  • US10275255B2 patent drawing
  • US10275255B2 patent drawing
  • US10275255B2 patent drawing

AI summary

A method for dependency broadcasting through a source organized source view data structure. The method includes receiving an incoming instruction sequence using a global front end; grouping the instructions to form instruction blocks; using a plurality of register templates to track instruction destinations and instruction sources by populating the register template with block numbers corresponding to the instruction blocks, wherein the block numbers corresponding to the instruction blocks indicate interdependencies among the blocks of instructions; populating a source organized source view data structure, wherein the source view data structure stores sources corresponding to the instruction blocks as recorded by the plurality of register templates; upon dispatch of one block of the instruction blocks, broadcasting a number belonging to the one block to a row of the source view data structure that relates that block and marking the sources of the row accordingly; and updating the dependency information of remaining instruction blocks in accordance with the broadcast.