Space-Adaptive Lock-Free Freelist Using Pointer-Sized Synchronization

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Solution Overview

Problem

Existing lock-free data structures face challenges in coordinating access to shared data across 64-bit architectures, particularly in manipulating 64-bit pointers and version numbers, leading to restrictions on variable size and usage, and are not portable between 32-bit and 64-bit applications.

Innovation Solution

The development of lock-free, population-oblivious, and space-adaptive data structures that employ pointer-sized single-target synchronization operations to emulate load-linked and store-conditional (LL/SC) style synchronization, allowing for 64-bit-clean implementations of arbitrary-size variables, FIFO queues, and freelists, which eliminate restrictions on variable size and support portability across architectures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If 64-bit synchronization primitives are used to atomically manipulate 32-bit pointers with version numbers, then lock-free data structures can be implemented on 64-bit architectures, but the implementations are not portable between 32-bit and 64-bit applications and require additional synchronization space

Engineering Contradiction:
Improveatomic manipulation capabilityVSAvoidportability between architectures
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent changes the synchronization primitive from 64-bit CAS operations to 32-bit CAS operations, matching the pointer size. This parameter change enables the same implementation to work on both 32-bit and 64-bit architectures, achieving portability while maintaining atomic manipulation capabilities through single-target synchronization on pointer-sized variables

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the synchronization operation into pointer-sized units rather than using monolithic 64-bit operations. By breaking down the synchronization into smaller, architecture-appropriate units (32-bit CAS operations on individual pointer fields), the implementation becomes adaptable to different architecture widths while maintaining correctness

Inventive Principle:
Principle #1Segmentation

2Reliability

If 64-bit CAS operations are used to manipulate pointers and version numbers, then atomic access is achieved, but space overhead increases and the ABA problem arises with version numbers

Engineering Contradiction:
Improveatomic accessVSAvoidspace overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the version number field from the pointer structure and separates it into a distinct field. This extraction allows the pointer itself to be manipulated using simple 32-bit CAS operations without needing to embed version information within the pointer bits, thereby reducing space overhead while maintaining atomic access capabilities

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of embedding version numbers within the pointer (the conventional approach), the patent inverts the approach by keeping the pointer clean and separate, using a distinct version field that is updated independently. This inversion eliminates the ABA problem by decoupling the pointer value from its version counter

Inventive Principle:
Principle #13The other way round (Inversion)

3Adaptability or versatility

If LL/SC synchronization is emulated using pointer-sized single-target synchronization, then space adaptivity and lock-free operation are achieved, but the emulation adds implementation complexity

Engineering Contradiction:
Improvespace-adaptive behaviorVSAvoidemulation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements nested synchronization where pointer-sized CAS operations are composed to emulate larger LL/SC operations. The nested structure allows multiple pointer-sized operations to work together to achieve the semantics of larger synchronization operations, enabling space-adaptive behavior while keeping individual operations simple and lock-free

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS7533221B1Space-adaptive lock-free free-list using pointer-sized single-target synchronization
Publication Date: 2009.05.12 ORACLE AMERICAN INC
  • US7533221B1 patent drawing
  • US7533221B1 patent drawing
  • US7533221B1 patent drawing

AI summary

Many conventional lock-free data structures exploit techniques that are possible only because state-of-the-art 64-bit processors are still running 32-bit operating systems and applications. As software catches up to hardware, “64-bit-clean” lock-free data structures, which cannot use such techniques, are needed. We present several 64-bit-clean lock-free implementations: including load-linked/store conditional variables of arbitrary size, a FIFO queue, and a freelist. In addition to being portable to 64-bit software (or more generally full-architectural-width pointer operations), our implementations also improve on existing techniques in that they are (or can be) space-adaptive and do not require a priori knowledge of the number of threads that will access them.