Integrated Cryptographic Circuits for Low-Power Space Data Throughput

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional cryptographic systems in space vehicles are large, power-consuming, and have limited bandwidth, which are inadequate for next-generation vehicles with restricted power resources and increased data throughput requirements.

Innovation Solution

Integrated cryptographic processing circuits with multiple cryptographic modules (CMEIs) that enable parallel encryption/decryption, power management, and redundancy, allowing for high bandwidth data processing with reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If conventional cryptographic systems are used in space vehicles, then data encryption can be performed, but the systems consume excessive power and have limited bandwidth

Engineering Contradiction:
Improvepower consumptionVSAvoiddata throughput bandwidth
Core Design Contradiction:
Use of energy by moving objectVSProductivity

Solution Approach 1:

The cryptographic system is divided into multiple independent cryptographic modules (CMEIs) that can process data packets in parallel. Each module handles a portion of the data stream, enabling the system to achieve high bandwidth throughput while maintaining low power consumption per module. The input module distributes packets across multiple CMEIs, and the output module collects results, creating a scalable architecture where power consumption can be managed independently from total processing capacity.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple cryptographic modules are used to increase bandwidth, then data throughput is improved, but device complexity increases

Engineering Contradiction:
Improvedata throughputVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Multiple cryptographic modules are integrated onto a single integrated circuit board, sharing common input and output modules as well as power management resources. This merging approach allows the system to achieve high throughput through parallel processing while reducing overall complexity by eliminating redundant components. The shared input module handles packet distribution and the shared output module consolidates results, reducing the total component count compared to separate cryptographic systems.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If cryptographic modules are continuously activated to maintain security, then security is ensured, but power consumption increases

Engineering Contradiction:
Improvesecurity continuityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system implements dynamic power management where the electronic processor can selectively activate or deactivate specific cryptographic modules based on real-time security requirements and power availability. This dynamic control allows the system to maintain security by keeping essential modules active while powering down less critical modules during low-power periods, achieving a balance between security continuity and power consumption that static configurations cannot provide.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP4260510B1Integrated cryptographic circuits in space applications
Publication Date: 2026.02.25 TETHERS UNLIMITED INC
  • EP4260510B1 patent drawingFigure 1
  • EP4260510B1 patent drawingFigure 2
  • EP4260510B1 patent drawingFigure 3

AI summary

Cryptographic integrated circuits include an input module configured to receive a stream of input data packets, a plurality of cryptographic modules coupled to the input module, where each cryptographic module includes an input port for receiving an input data packet and an output port for transmitting an output data packet, and is configured to encrypt or decrypt the received input data packet to generate an output data packet, and an output module configured to receive output data packets from the plurality of cryptographic modules and to generate an output data stream comprising the output data packets, where the input and output modules and the plurality of cryptographic modules are mounted on a single integrated circuit board, and wherein the input module is configured to distribute the input data packets among the plurality of cryptographic modules.