Spacer and Back-Side Contact Structures for S/D Merge Prevention
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Solution Overview
Problem
The challenge of preventing epitaxial source/drain regions on adjacent fin structures from merging during fabrication and forming reliable electrical connections between these regions and power rails in scaled-down semiconductor devices is increasing due to the complexity of semiconductor manufacturing processes.
Innovation Solution
The use of S/D spacers with controlled lateral dimensions to manage epitaxial growth, combined with back-side contact structures and power rails, which reduce lateral merging and enhance electrical connectivity, thereby minimizing device area and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used for scaled-down devices, then manufacturing complexity increases, but S/D regions may merge laterally during epitaxial growth
Solution Approach 1:
The spacer structures are formed prior to the epitaxial growth of source/drain regions. These spacers are deposited and patterned in advance to define the lateral boundaries where S/D regions should not grow, preventing merging before the epitaxial process occurs. This preliminary structuring enables precise control of lateral dimensions during subsequent manufacturing steps.
2Productivity
If device dimensions are scaled down to increase storage capacity and processing speed, then device density improves, but electrical connection reliability becomes more difficult to achieve
Solution Approach 1:
The invention transitions from conventional planar contact structures to three-dimensional contact structures that extend vertically through multiple layers. The contact structures are formed in trenches that penetrate through interlayer dielectric layers to reach the source/drain regions, enabling reliable electrical connections in the vertical dimension while maintaining high device density in the lateral dimension.
3Ease of manufacture
If conventional contact structures are used, then manufacturing is simpler, but device area and power consumption increase
Solution Approach 1:
The contact structures utilize thin film deposition techniques to create conformal spacer layers and contact fills. The spacers are formed as thin conformal films on the sidewalls of trenches, and the contact structures themselves are filled as thin films that conform to the trench geometry. This approach enables precise area control while maintaining manufacturing feasibility through standard thin film processes.
Data Source
AI summary
A semiconductor device with back-side contact structures and a method of fabricating the same are disclosed. The semiconductor device includes first and second S/D regions, a stack of nanostructured semiconductor layers disposed adjacent to the first S/D region, a gate structure surrounding each of the nanostructured semiconductor layers, a first pair of spacers disposed on opposite sidewalls of the first S/D region, a second pair of spacers disposed on opposite sidewalls of the second S/D region, a third pair of spacers disposed on opposite sidewalls of the gate structure, a first contact structure disposed on a first surface of the first S/D region, and a second contact structure disposed on a second surface of the first S/D region. The first and second surfaces are opposite to each other. The first pair of spacers are disposed on opposite sidewalls of the second contact structure.