Spacer Chip Surface Roughening for Mold Resin Adhesion
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Solution Overview
Problem
In semiconductor devices using FOD technology, the weak adhesive force between the spacer chip and mold resin leads to separation issues in high-temperature and high-humidity environments, compromising device reliability, and applying polyimide to address this increases manufacturing costs.
Innovation Solution
A semiconductor device package structure is developed where the spacer chip's surface region in contact with the mold resin is roughened using laser processing to form a processed layer of silicon oxide or silicon carbide, enhancing adhesion and preventing peel-off, while maintaining a low manufacturing cost.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a spacer chip with a mirrored surface is used in FOD technology, then the upper layer chip can be miniaturized and the lower chip can be buried in adhesive film, but the adhesive force between the spacer chip and mold resin becomes weak causing separation in high-temperature and high-humidity environments
Solution Approach 1:
The invention applies local quality by creating a roughened surface region on a specific area of the spacer chip where the mold resin contacts it, while leaving other regions with different surface characteristics. This localized surface treatment enhances adhesion precisely where needed (at the mold resin interface) without affecting other functional areas of the chip, thereby resolving the contradiction between maintaining miniaturization capability and improving adhesive strength.
Solution Approach 2:
The invention changes the surface parameter (roughness) of the spacer chip by forming a roughened surface region with increased surface area and irregularities. This parameter change from a smooth mirrored surface to a roughened surface enhances the mechanical interlocking and adhesion between the spacer chip and mold resin, preventing separation in high-temperature and high-humidity environments while maintaining the overall chip structure and miniaturization benefits.
2Reliability
If polyimide is applied onto the spacer chip to prevent separation, then the adhesive strength between spacer chip and mold resin is improved, but the manufacturing cost increases
Solution Approach 1:
The invention employs a cost-effective approach by using a roughened surface region formed through laser processing or other surface treatment methods instead of applying expensive polyimide coating. This creates a durable adhesive interface through physical surface modification rather than chemical coating, achieving reliable adhesion at lower manufacturing cost while avoiding the need for additional material layers and complex coating processes.
Solution Approach 2:
The invention substitutes the chemical/coating-based solution (polyimide application) with a physical surface treatment approach (laser processing or mechanical roughening). This replaces the need for additional coating materials and complex deposition processes with a more straightforward surface modification technique, thereby reducing manufacturing cost while achieving the same adhesion enhancement goal through physical surface structure changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The roughened surface region significantly improves the adhesion between the spacer chip and mold resin, enhancing the reliability of the semiconductor device without increasing manufacturing costs.
Implementation Method 1
a first region of a front surface of the spacer chip with which the mold resin comes in contact is roughened
Implementation Method 2
form a processed layer of silicon oxide or silicon carbide
Data Source
AI summary
A semiconductor device includes a substrate, a first semiconductor chip on the substrate, a first adhesive material on the first semiconductor chip, a spacer chip on the first adhesive material, a second adhesive material on the spacer chip, a second semiconductor chip on the second adhesive material, and a resin material that covers the first and second semiconductor chips and the spacer chip. The spacer chip has a first region with which the resin material comes in contact is roughened and a second region that is different from the first region.