Semiconductor Pattern Layout Using Spacer-Defined Closed Areas
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Solution Overview
Problem
Existing semiconductor device patterning technologies, such as Spacer Patterning Technology (SPT), struggle to enhance the complexity and degree of freedom of lines in semiconductor devices.
Innovation Solution
A method of forming patterns for semiconductor devices involves creating spacers with specific geometries, including first and second spacers with line portions and bending portions, to define closed areas where additional conductive patterns can be placed, thereby increasing layout flexibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If Spacer Patterning Technology (SPT) is used to form high density patterns, then manufacturing precision is improved, but device complexity is insufficient
Solution Approach 1:
The patent segments the pattern formation process into multiple distinct stages: forming mandrels with initial patterns, depositing spacers on mandrels, selectively removing mandrels, and forming additional patterns. This multi-stage segmentation enables complex final patterns to be constructed from simpler intermediate patterns, resolving the contradiction between manufacturing precision and device complexity.
Solution Approach 2:
The patent performs preliminary actions by first forming mandrels with basic patterns before creating the final complex patterns. The mandrels serve as preliminary structures that guide subsequent spacer formation and pattern development. This preliminary action allows complex geometries to be built systematically, improving both precision and complexity.
2Ease of manufacture
If traditional patterning methods are used, then manufacturing process is simple, but layout flexibility is limited
Solution Approach 1:
The patent utilizes the vertical dimension by forming three-dimensional spacer structures on mandrels. The spacers extend vertically from the mandrel surfaces, creating patterns that cannot be achieved with traditional planar photolithography alone. This dimensional transition enables greater layout flexibility while maintaining manufacturing simplicity through sequential processing steps.
Solution Approach 2:
The patent introduces mandrels as intermediary structures that facilitate pattern formation. These mandrels serve as temporary mediators that enable the creation of complex patterns through spacer deposition. The mandrels can be selectively removed after spacer formation, allowing flexible pattern design without complicating the overall manufacturing process.
Data Source
AI summary
A semiconductor device includes a first conductive pattern having a first line portion extending in a first direction and a first bending portion that extends from the first line portion. A closed area, surrounded by the first line portion and the first bending portion, is defined at one side of the first line portion. The semiconductor device further includes a second conductive pattern disposed in the closed area, the second conductive pattern being spaced apart from the first conductive pattern.