Spacer Die Structure for Stacked Packages With Reliable PCB Solder Joints
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Solution Overview
Problem
The increasing demand for smaller form factor portable electronic devices leads to reduced board space for semiconductor packages, resulting in deteriorated solder joint connections due to thermal cycling, with frequent failures occurring at die edge regions where solder joints are positioned beneath the bottommost die in stacked die semiconductor packages.
Innovation Solution
A spacer die is positioned between the lowermost semiconductor die and the substrate to translate thermally-induced shear stress from electrical contact pads to mechanical contact pads, reducing the stress on solder joints and eliminating the need for underfill, thereby enhancing solder joint reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If stacked die packages are used to reduce board space, then area of semiconductor package is reduced, but reliability of solder joint connection deteriorates due to thermal cycling
Solution Approach 1:
A spacer die is introduced as an intermediary component between the lowermost semiconductor die and the substrate. This spacer die has a footprint larger than the lowermost die, extending beyond its edges to provide mechanical support and stress distribution. The spacer die acts as a mediator that transfers and distributes thermally-induced shear stress away from the vulnerable solder joints at the die edges, thereby improving solder joint reliability while maintaining the compact stacked die configuration.
2Reliability
If spacer die with larger footprint is used to improve solder joint reliability, then reliability of solder joint connection is improved, but device complexity increases
Solution Approach 1:
The spacer die performs multiple functions within a single component: (1) it provides mechanical support to the lowermost die, (2) it distributes thermally-induced shear stress away from solder joints, (3) it eliminates the need for underfill material, and (4) it maintains the compact form factor. By consolidating these multiple functions into a single spacer die component, the solution improves reliability without proportionally increasing device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of a spacer die improves solder joint reliability by 2 to 3 times and eliminates the need for costly underfill, effectively addressing the issue of solder joint failure caused by thermal expansion differences between semiconductor dies and the printed circuit board.
Implementation Method 1
thermal expansion differences between semiconductor dies and the printed circuit board
Data Source
AI summary
Stacked die semiconductor packages may include a spacer die disposed between stacked dies in the semiconductor package and the semiconductor package substrate. The spacer die translates thermally induced stresses on the solder connections between the substrate and an underlying member, such as a printed circuit board, from electrical structures communicably or conductively coupling the semiconductor package substrate to the underlying structure to mechanical structures that physically couple the semiconductor package to the underlying structure. The footprint area of the spacer die is greater than the sum of the footprint areas of the individual stacked dies in the semiconductor package and less than or equal to the footprint area of the semiconductor package substrate. The spacer die may have nay physical configuration, thickness, shape, or geometry. The spacer die may have a coefficient of thermal expansion similar to that of the lowermost semiconductor die in the die stack.