Spacer Etching Layout for Smaller IC Cut Features
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Solution Overview
Problem
The semiconductor integrated circuit industry faces challenges in achieving small cut features and a large process window due to constraints in the lithography process, particularly in forming mandrels for devices like FinFETs, where the pitch of the final pattern is difficult to reduce effectively.
Innovation Solution
A method involving a flow chart of operations that includes forming a substrate with multiple material layers, creating hard mask layers, performing multiple patterning processes to form mandrel trenches, and forming spacer features on the sidewalls, which allows for the formation of a target pattern with improved uniformity and smaller cut features by merging and removing these features to achieve a desirable pattern density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography processes are used to form mandrels, then the process is simple and straightforward, but the pitch of the final pattern cannot be reduced effectively and small cut features cannot be obtained
Solution Approach 1:
The patterning process is divided into multiple stages: first forming initial mandrels, then depositing spacers, removing mandrels, and repeating the process to achieve pitch multiplication. This segmentation allows each step to be optimized independently while achieving the overall goal of reduced pitch
Solution Approach 2:
Mandrels are formed in advance before the final pattern is created. The preliminary mandrels serve as templates that guide subsequent spacer formation, enabling precise control over the final pattern geometry and pitch
2Manufacturing precision
If the lithography process parameters are adjusted to achieve smaller features, then the feature size is reduced, but the process window becomes smaller
Solution Approach 1:
Spacer material serves as an intermediary that transfers the pattern from the lithographically-defined mandrel to the final structure. This intermediary approach allows the lithography process to work at relaxed dimensions while the spacer formation process achieves the final small dimensions with high precision
Solution Approach 2:
The process transitions from lithography parameters (where small features require small process windows) to spacer deposition parameters (where thickness control provides precise feature dimensions with larger process windows). The critical dimension control shifts from optical parameters to thin film deposition parameters
Data Source
AI summary
A method includes forming a first layer on a substrate; forming a first plurality of trenches in the first layer by a patterning process; and forming a second plurality of trenches in the first layer by another patterning process, resulting in combined trench patterns in the first layer. A first trench of the second plurality connects two trenches of the first plurality. The method further includes forming dielectric spacer features on sidewalls of the combined trench patterns. A space between two opposing sidewalls of the first trench is completely filled by the dielectric spacer features and another space between two opposing sidewalls of one of the two trenches is partially filled by the dielectric spacer features.